i386.md (*ashl<mode>3_mask): Change operand 2 preticate to nonimmediate_operand.

	* config/i386/i386.md (*ashl<mode>3_mask): Change operand 2 preticate
	to nonimmediate_operand.  Force operand 2 to register when allowed.
	(*<shiftrt_insn><mode>3_mask): Ditto.
	(*<rotate_insn><mode>3_mask): Ditto.

From-SVN: r164915

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 41190f9..9d1e2b5 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2010-10-03  Uros Bizjak  <ubizjak@gmail.com>
+
+       * config/i386/i386.md (*ashl<mode>3_mask): Change operand 2 preticate
+       to nonimmediate_operand.  Force operand 2 to register when allowed.
+       (*<shiftrt_insn><mode>3_mask): Ditto.
+       (*<rotate_insn><mode>3_mask): Ditto.
+
 2010-10-02  H.J. Lu  <hongjiu.lu@intel.com>
 
        PR tree-optimization/45720
@@ -9,7 +16,7 @@
        * tree-vect-stmts.c (vectorizable_store): Allow negative steps.
        (perm_mask_for_reverse): Removed.
        (reverse_vec_elements): Likewise.
-       (vectorizable_load): Don't hanle negative steps.
+       (vectorizable_load): Don't handle negative steps.
 
 2010-10-02  Jan Hubicka  <jh@suse.cz>
 

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 87bcd27..fc190e9 100644 (file)
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -9152,14 +9152,13 @@
 })
 
 ;; Avoid useless masking of count operand.
-
 (define_insn_and_split "*ashl<mode>3_mask"
   [(set (match_operand:SWI48 0 "nonimmediate_operand" "=rm")
        (ashift:SWI48
          (match_operand:SWI48 1 "nonimmediate_operand" "0")
          (subreg:QI
            (and:SI
-             (match_operand:SI 2 "register_operand" "c")
+             (match_operand:SI 2 "nonimmediate_operand" "c")
              (match_operand:SI 3 "const_int_operand" "n")) 0)))
    (clobber (reg:CC FLAGS_REG))]
   "ix86_binary_operator_ok (ASHIFT, <MODE>mode, operands)
@@ -9170,7 +9169,12 @@
   [(parallel [(set (match_dup 0)
                   (ashift:SWI48 (match_dup 1) (match_dup 2)))
              (clobber (reg:CC FLAGS_REG))])]
-  "operands[2] = simplify_gen_subreg (QImode, operands[2], SImode, 0);"
+{
+  if (can_create_pseudo_p ())
+    operands [2] = force_reg (SImode, operands[2]);
+
+  operands[2] = simplify_gen_subreg (QImode, operands[2], SImode, 0);
+}
   [(set_attr "type" "ishift")
    (set_attr "mode" "<MODE>")])
 
@@ -9714,14 +9718,13 @@
   "ix86_expand_binary_operator (<CODE>, <MODE>mode, operands); DONE;")
 
 ;; Avoid useless masking of count operand.
-
 (define_insn_and_split "*<shiftrt_insn><mode>3_mask"
   [(set (match_operand:SWI48 0 "nonimmediate_operand" "=rm")
        (any_shiftrt:SWI48
          (match_operand:SWI48 1 "nonimmediate_operand" "0")
          (subreg:QI
            (and:SI
-             (match_operand:SI 2 "register_operand" "c")
+             (match_operand:SI 2 "nonimmediate_operand" "c")
              (match_operand:SI 3 "const_int_operand" "n")) 0)))
    (clobber (reg:CC FLAGS_REG))]
   "ix86_binary_operator_ok (<CODE>, <MODE>mode, operands)
@@ -9732,7 +9735,12 @@
   [(parallel [(set (match_dup 0)
                   (any_shiftrt:SWI48 (match_dup 1) (match_dup 2)))
              (clobber (reg:CC FLAGS_REG))])]
-  "operands[2] = simplify_gen_subreg (QImode, operands[2], SImode, 0);"
+{
+  if (can_create_pseudo_p ())
+    operands [2] = force_reg (SImode, operands[2]);
+
+  operands[2] = simplify_gen_subreg (QImode, operands[2], SImode, 0);
+}
   [(set_attr "type" "ishift")
    (set_attr "mode" "<MODE>")])
 
@@ -10089,14 +10097,13 @@
   "ix86_expand_binary_operator (<CODE>, <MODE>mode, operands); DONE;")
 
 ;; Avoid useless masking of count operand.
-
 (define_insn_and_split "*<rotate_insn><mode>3_mask"
   [(set (match_operand:SWI48 0 "nonimmediate_operand" "=rm")
        (any_rotate:SWI48
          (match_operand:SWI48 1 "nonimmediate_operand" "0")
          (subreg:QI
            (and:SI
-             (match_operand:SI 2 "register_operand" "c")
+             (match_operand:SI 2 "nonimmediate_operand" "c")
              (match_operand:SI 3 "const_int_operand" "n")) 0)))
    (clobber (reg:CC FLAGS_REG))]
   "ix86_binary_operator_ok (<CODE>, <MODE>mode, operands)
@@ -10107,7 +10114,12 @@
   [(parallel [(set (match_dup 0)
                   (any_rotate:SWI48 (match_dup 1) (match_dup 2)))
              (clobber (reg:CC FLAGS_REG))])]
-  "operands[2] = simplify_gen_subreg (QImode, operands[2], SImode, 0);"
+{
+  if (can_create_pseudo_p ())
+    operands [2] = force_reg (SImode, operands[2]);
+
+  operands[2] = simplify_gen_subreg (QImode, operands[2], SImode, 0);
+}
   [(set_attr "type" "rotate")
    (set_attr "mode" "<MODE>")])