arm64: dts: ti: k3-am64-main: Add GPMC memory controller node
authorRoger Quadros <rogerq@kernel.org>
Tue, 2 Aug 2022 10:44:55 +0000 (13:44 +0300)
committerVignesh Raghavendra <vigneshr@ti.com>
Thu, 1 Sep 2022 10:08:44 +0000 (15:38 +0530)
The GPMC is a unified memory controller dedicated for interfacing
with external memory devices like
  - Asynchronous SRAM-like memories and ASICs
  - Asynchronous, synchronous, and page mode burst NOR flash
  - NAND flash
  - Pseudo-SRAM devices

Signed-off-by: Roger Quadros <rogerq@kernel.org>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
Link: https://lore.kernel.org/r/20220802104456.11069-2-rogerq@kernel.org
arch/arm64/boot/dts/ti/k3-am64-main.dtsi
arch/arm64/boot/dts/ti/k3-am642-evm.dts
arch/arm64/boot/dts/ti/k3-am642-sk.dts

index 744629cb67257062e0b203124fd74b130e6af12f..14238bac71e74e10c2caa089598c619bbf2b4d93 100644 (file)
                        status = "disabled"; /* Used by OP-TEE */
                };
        };
+
+       gpmc0: memory-controller@3b000000 {
+               compatible = "ti,am64-gpmc";
+               power-domains = <&k3_pds 80 TI_SCI_PD_EXCLUSIVE>;
+               clocks = <&k3_clks 80 0>;
+               clock-names = "fck";
+               reg = <0x00 0x03b000000 0x00 0x400>,
+                     <0x00 0x050000000 0x00 0x8000000>;
+               reg-names = "cfg", "data";
+               interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
+               gpmc,num-cs = <3>;
+               gpmc,num-waitpins = <2>;
+               #address-cells = <2>;
+               #size-cells = <1>;
+               interrupt-controller;
+               #interrupt-cells = <2>;
+               gpio-controller;
+               #gpio-cells = <2>;
+       };
 };
index ad150c704623581b2b7ef06cbd755e4ecf06f3c1..eaaedd5e062f98e967dad26d24e785e9d9295e69 100644 (file)
        pinctrl-0 = <&main_mcan1_pins_default>;
        phys = <&transceiver2>;
 };
+
+&gpmc0 {
+       status = "disabled";
+};
index 2620469a75179f22a9ddef9f72411ee89b49ff77..360c177459e691d0d0968fd02c5ba8c8f6ad3665 100644 (file)
 &main_mcan1 {
        status = "disabled";
 };
+
+&gpmc0 {
+       status = "disabled";
+};