ARM: dts: qcom: align SDHCI reg-names with DT schema

DT schema requires SDHCI reg names to be hc/core without "_mem" suffix,
just like TXT bindings were expecting before the conversion.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220712144245.17417-5-krzysztof.kozlowski@linaro.org

diff --git a/arch/arm/boot/dts/qcom-apq8084.dtsi b/arch/arm/boot/dts/qcom-apq8084.dtsi
index 0e559626f83150b1e3ed811fa0fd2b4d1abbe5af..1c8d3bdc8fff465d270c19a8ee24baebcb3e6d00 100644 (file)
--- a/arch/arm/boot/dts/qcom-apq8084.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8084.dtsi
@@ -422,7 +422,7 @@
                mmc@f9824900 {
                        compatible = "qcom,apq8084-sdhci", "qcom,sdhci-msm-v4";
                        reg = <0xf9824900 0x11c>, <0xf9824000 0x800>;
-                       reg-names = "hc_mem", "core_mem";
+                       reg-names = "hc", "core";
                        interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
                        interrupt-names = "hc_irq", "pwr_irq";
                        clocks = <&gcc GCC_SDCC1_APPS_CLK>,
@@ -435,7 +435,7 @@
                mmc@f98a4900 {
                        compatible = "qcom,apq8084-sdhci", "qcom,sdhci-msm-v4";
                        reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>;
-                       reg-names = "hc_mem", "core_mem";
+                       reg-names = "hc", "core";
                        interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
                        interrupt-names = "hc_irq", "pwr_irq";
                        clocks = <&gcc GCC_SDCC2_APPS_CLK>,

diff --git a/arch/arm/boot/dts/qcom-ipq4019.dtsi b/arch/arm/boot/dts/qcom-ipq4019.dtsi
index c07c8a791497809fbe6becfe5ceb80aebba92906..473b19204f10dd43a72ab1d012399e10ff67f8a7 100644 (file)
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -224,6 +224,7 @@
                sdhci: mmc@7824900 {
                        compatible = "qcom,sdhci-msm-v4";
                        reg = <0x7824900 0x11c>, <0x7824000 0x800>;
+                       reg-names = "hc", "core";
                        interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
                        interrupt-names = "hc_irq", "pwr_irq";
                        bus-width = <8>;

diff --git a/arch/arm/boot/dts/qcom-msm8226.dtsi b/arch/arm/boot/dts/qcom-msm8226.dtsi
index efb5d1edc3a8f07d2df2046beb807ebccc477003..5ec46782ffb2cb32222b0971626bf6cb78e88085 100644 (file)
--- a/arch/arm/boot/dts/qcom-msm8226.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8226.dtsi
@@ -130,7 +130,7 @@
                sdhc_1: mmc@f9824900 {
                        compatible = "qcom,msm8226-sdhci", "qcom,sdhci-msm-v4";
                        reg = <0xf9824900 0x11c>, <0xf9824000 0x800>;
-                       reg-names = "hc_mem", "core_mem";
+                       reg-names = "hc", "core";
                        interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
                        interrupt-names = "hc_irq", "pwr_irq";
@@ -146,7 +146,7 @@
                sdhc_2: mmc@f98a4900 {
                        compatible = "qcom,msm8226-sdhci", "qcom,sdhci-msm-v4";
                        reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>;
-                       reg-names = "hc_mem", "core_mem";
+                       reg-names = "hc", "core";
                        interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
                        interrupt-names = "hc_irq", "pwr_irq";
@@ -162,7 +162,7 @@
                sdhc_3: mmc@f9864900 {
                        compatible = "qcom,msm8226-sdhci", "qcom,sdhci-msm-v4";
                        reg = <0xf9864900 0x11c>, <0xf9864000 0x800>;
-                       reg-names = "hc_mem", "core_mem";
+                       reg-names = "hc", "core";
                        interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
                        interrupt-names = "hc_irq", "pwr_irq";

diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi
index 2cf9739fb86f1945f7758a7a89a33f0f6c24dcde..e137e1ec8ac93c7b89badf893ca900d9699fc583 100644 (file)
--- a/arch/arm/boot/dts/qcom-msm8974.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8974.dtsi
@@ -439,7 +439,7 @@
                sdhc_1: mmc@f9824900 {
                        compatible = "qcom,msm8974-sdhci", "qcom,sdhci-msm-v4";
                        reg = <0xf9824900 0x11c>, <0xf9824000 0x800>;
-                       reg-names = "hc_mem", "core_mem";
+                       reg-names = "hc", "core";
                        interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
                        interrupt-names = "hc_irq", "pwr_irq";
@@ -456,7 +456,7 @@
                sdhc_3: mmc@f9864900 {
                        compatible = "qcom,msm8974-sdhci", "qcom,sdhci-msm-v4";
                        reg = <0xf9864900 0x11c>, <0xf9864000 0x800>;
-                       reg-names = "hc_mem", "core_mem";
+                       reg-names = "hc", "core";
                        interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
                        interrupt-names = "hc_irq", "pwr_irq";
@@ -475,7 +475,7 @@
                sdhc_2: mmc@f98a4900 {
                        compatible = "qcom,msm8974-sdhci", "qcom,sdhci-msm-v4";
                        reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>;
-                       reg-names = "hc_mem", "core_mem";
+                       reg-names = "hc", "core";
                        interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
                        interrupt-names = "hc_irq", "pwr_irq";

diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi
index 8daefd50217a30eaba58524ade54bb49b074f731..4cd405db550009923dc18efb7323ee0e359b9d37 100644 (file)
--- a/arch/arm/boot/dts/qcom-sdx65.dtsi
+++ b/arch/arm/boot/dts/qcom-sdx65.dtsi
@@ -334,7 +334,7 @@
                sdhc_1: mmc@8804000 {
                        compatible = "qcom,sdx65-sdhci", "qcom,sdhci-msm-v5";
                        reg = <0x08804000 0x1000>;
-                       reg-names = "hc_mem";
+                       reg-names = "hc";
                        interrupts = <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;
                        interrupt-names = "hc_irq", "pwr_irq";