fm10k: Reset mailbox global interrupts
authorNgai-Mint Kwan <ngai-mint.kwan@intel.com>
Tue, 7 Jun 2016 23:08:46 +0000 (16:08 -0700)
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>
Wed, 20 Jul 2016 22:22:10 +0000 (15:22 -0700)
When a data path reset is initiated, write control to the PCIE_GMBX is
yanked from the switch manager. The switch manager writes to this
register to clear mailbox global interrupt bits as part of its mailbox
interrupt handling routine. When the device recovers from the data path
reset and these bits are not cleared, it will prevent future mailbox
global interrupts from being triggered. Upon confirming that the device
has exited from a data path reset, clear these bits to ensure the proper
functioning of the mailbox global interrupt.

Signed-off-by: Ngai-Mint Kwan <ngai-mint.kwan@intel.com>
Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Tested-by: Krishneil Singh <Krishneil.k.singh@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
drivers/net/ethernet/intel/fm10k/fm10k_mbx.h
drivers/net/ethernet/intel/fm10k/fm10k_pf.c

index b7dbc8a..35c1dba 100644 (file)
@@ -41,6 +41,8 @@ struct fm10k_mbx_info;
 #define FM10K_MBX_ACK_INTERRUPT                        0x00000010
 #define FM10K_MBX_INTERRUPT_ENABLE             0x00000020
 #define FM10K_MBX_INTERRUPT_DISABLE            0x00000040
+#define FM10K_MBX_GLOBAL_REQ_INTERRUPT         0x00000200
+#define FM10K_MBX_GLOBAL_ACK_INTERRUPT         0x00000400
 #define FM10K_MBICR(_n)                ((_n) + 0x18840)
 #define FM10K_GMBX             0x18842
 
index dc75507..69e2c82 100644 (file)
@@ -77,6 +77,10 @@ static s32 fm10k_reset_hw_pf(struct fm10k_hw *hw)
        if (!(reg & FM10K_IP_NOTINRESET))
                err = FM10K_ERR_RESET_FAILED;
 
+       /* Reset mailbox global interrupts */
+       reg = FM10K_MBX_GLOBAL_REQ_INTERRUPT | FM10K_MBX_GLOBAL_ACK_INTERRUPT;
+       fm10k_write_reg(hw, FM10K_GMBX, reg);
+
 out:
        return err;
 }