rtc: s5m: fix to update ctrl register

According to datasheet, the S2MPS13X and S2MPS14X should update write
buffer via setting WUDR bit to high after ctrl register is updated.

If not, ALARM interrupt of rtc-s5m doesn't happen first time when i use
tools/testing/selftests/timers/rtctest.c test program and hour format is
used to 12 hour mode in Odroid-XU3 board.

Change-Id: I330bea966bdcfbe85aa56f8b4ce91e7b291cdc37
Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Cc: <stable@vger.kernel.org>

diff --git a/drivers/rtc/rtc-s5m.c b/drivers/rtc/rtc-s5m.c
index 6192dc1b9b0e938c4ea1b1c8c868ddf1c3358b64..751e35789cc7bf35199cba0f9d5b346cb24e9970 100644 (file)
--- a/drivers/rtc/rtc-s5m.c
+++ b/drivers/rtc/rtc-s5m.c
@@ -633,6 +633,18 @@ static int s5m8767_rtc_init_reg(struct s5m_rtc_info *info)
        case S2MPS13X:
                data[0] = (0 << BCD_EN_SHIFT) | (1 << MODEL24_SHIFT);
                ret = regmap_write(info->regmap, info->regs->ctrl, data[0]);
+               if (ret < 0)
+                       break;
+
+               ret = regmap_update_bits(info->regmap,
+                               info->regs->rtc_udr_update,
+                               info->regs->rtc_udr_mask,
+                               info->regs->rtc_udr_mask);
+               if (ret < 0)
+                       break;
+
+               ret = s5m8767_wait_for_udr_update(info);
+
                break;
 
        default: