* config/i386/i386.c (ix86_init_mmx_sse_builtins):

        __builtin_ia32_ldmxcsr and __builtin_ia32_stmxcsr are SSE, not MXX.
        * config/i386/i386.md (ldmxcsr, stmxcsr): SSE, not MMX.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@61013 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index b6028c6..6114e53 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2003-01-07  Sylvain Pion <Sylvain.Pion@mpi-sb.mpg.de>
+  
+       * config/i386/i386.c (ix86_init_mmx_sse_builtins):
+       __builtin_ia32_ldmxcsr and __builtin_ia32_stmxcsr are SSE, not MXX.
+       * config/i386/i386.md (ldmxcsr, stmxcsr): SSE, not MMX.
+
 2003-01-07  Benjamin Kosnik  <bkoz@redhat.com>
            Sunil Davasam  <sunil.k.davasam@intel.com>
 
@@ -54,9 +60,9 @@
 
        Segher Boessenkool  <segher@koffie.nl>
 
-        * config/rs6000/rs6000.c (rs6000_reg_names): Add missing registers.
-        (alt_reg_names): Ditto, fix formatting.
-        * config/rs6000/rs6000.h (DEBUG_REGISTER_NAMES): Fix formatting.
+       * config/rs6000/rs6000.c (rs6000_reg_names): Add missing registers.
+       (alt_reg_names): Ditto, fix formatting.
+       * config/rs6000/rs6000.h (DEBUG_REGISTER_NAMES): Fix formatting.
 
 2003-01-06  Kazu Hirata  <kazu@cs.umass.edu>
 
@@ -76,8 +82,8 @@
 
        Segher Boessenkool  <segher@koffie.nl>
 
-        * config/rs6000/altivec.md: Remove spaces from assembler
-        instruction argument lists.
+       * config/rs6000/altivec.md: Remove spaces from assembler
+       instruction argument lists.
        
 2003-01-07  Michael Hayes  <m.hayes@elec.canterbury.ac.nz>
 

diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index fd48e84..63d8a01 100644 (file)
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -1,6 +1,6 @@
 /* Subroutines used for code generation on IA-32.
    Copyright (C) 1988, 1992, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001,
-   2002 Free Software Foundation, Inc.
+   2002, 2003 Free Software Foundation, Inc.
 
 This file is part of GNU CC.
 
@@ -12932,8 +12932,6 @@ ix86_init_mmx_sse_builtins ()
   /* Add the remaining MMX insns with somewhat more complicated types.  */
   def_builtin (MASK_MMX, "__builtin_ia32_mmx_zero", di_ftype_void, IX86_BUILTIN_MMX_ZERO);
   def_builtin (MASK_MMX, "__builtin_ia32_emms", void_ftype_void, IX86_BUILTIN_EMMS);
-  def_builtin (MASK_MMX, "__builtin_ia32_ldmxcsr", void_ftype_unsigned, IX86_BUILTIN_LDMXCSR);
-  def_builtin (MASK_MMX, "__builtin_ia32_stmxcsr", unsigned_ftype_void, IX86_BUILTIN_STMXCSR);
   def_builtin (MASK_MMX, "__builtin_ia32_psllw", v4hi_ftype_v4hi_di, IX86_BUILTIN_PSLLW);
   def_builtin (MASK_MMX, "__builtin_ia32_pslld", v2si_ftype_v2si_di, IX86_BUILTIN_PSLLD);
   def_builtin (MASK_MMX, "__builtin_ia32_psllq", di_ftype_di_di, IX86_BUILTIN_PSLLQ);
@@ -12959,6 +12957,8 @@ ix86_init_mmx_sse_builtins ()
   def_builtin (MASK_MMX, "__builtin_ia32_packssdw", v4hi_ftype_v2si_v2si, IX86_BUILTIN_PACKSSDW);
   def_builtin (MASK_MMX, "__builtin_ia32_packuswb", v8qi_ftype_v4hi_v4hi, IX86_BUILTIN_PACKUSWB);
 
+  def_builtin (MASK_SSE1, "__builtin_ia32_ldmxcsr", void_ftype_unsigned, IX86_BUILTIN_LDMXCSR);
+  def_builtin (MASK_SSE1, "__builtin_ia32_stmxcsr", unsigned_ftype_void, IX86_BUILTIN_STMXCSR);
   def_builtin (MASK_SSE1, "__builtin_ia32_cvtpi2ps", v4sf_ftype_v4sf_v2si, IX86_BUILTIN_CVTPI2PS);
   def_builtin (MASK_SSE1, "__builtin_ia32_cvtps2pi", v2si_ftype_v4sf, IX86_BUILTIN_CVTPS2PI);
   def_builtin (MASK_SSE1, "__builtin_ia32_cvtsi2ss", v4sf_ftype_v4sf_int, IX86_BUILTIN_CVTSI2SS);

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 0a05537..8be5fef 100644 (file)
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -1,5 +1,6 @@
 ;; GCC machine description for IA-32 and x86-64.
-;; Copyright (C) 1988, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002
+;; Copyright (C) 1988, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
+;; 2001, 2002, 2003
 ;; Free Software Foundation, Inc.
 ;; Mostly by William Schelter.
 ;; x86_64 support added by Jan Hubicka
@@ -20383,17 +20384,17 @@
 (define_insn "ldmxcsr"
   [(unspec_volatile [(match_operand:SI 0 "memory_operand" "m")]
                    UNSPECV_LDMXCSR)]
-  "TARGET_MMX"
+  "TARGET_SSE"
   "ldmxcsr\t%0"
-  [(set_attr "type" "mmx")
+  [(set_attr "type" "sse")
    (set_attr "memory" "load")])
 
 (define_insn "stmxcsr"
   [(set (match_operand:SI 0 "memory_operand" "=m")
        (unspec_volatile:SI [(const_int 0)] UNSPECV_STMXCSR))]
-  "TARGET_MMX"
+  "TARGET_SSE"
   "stmxcsr\t%0"
-  [(set_attr "type" "mmx")
+  [(set_attr "type" "sse")
    (set_attr "memory" "store")])
 
 (define_expand "sfence"