arm64: dts: rockchip: add panel to Anbernic RG353 series

Add support for the newly mainlined panel to the RG353 series of
devices.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Link: https://lore.kernel.org/r/20221126011432.22891-2-macroalpha82@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

diff --git a/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353x.dtsi b/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353x.dtsi
index 65a80d1..17450aa 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353x.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353x.dtsi
@@ -20,6 +20,48 @@
        assigned-clock-rates = <1200000000>, <200000000>, <241500000>;
 };
 
+&dsi_dphy0 {
+       status = "okay";
+};
+
+&dsi0 {
+       status = "okay";
+       #address-cells = <1>;
+       #size-cells = <0>;
+
+       ports {
+               dsi0_in: port@0 {
+                       reg = <0>;
+                       dsi0_in_vp1: endpoint {
+                               remote-endpoint = <&vp1_out_dsi0>;
+                       };
+               };
+
+               dsi0_out: port@1 {
+                       reg = <1>;
+                       mipi_out_panel: endpoint {
+                               remote-endpoint = <&mipi_in_panel>;
+                       };
+               };
+       };
+
+       panel: panel@0 {
+               compatible = "anbernic,rg353p-panel", "newvision,nv3051d";
+               reg = <0>;
+               backlight = <&backlight>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&lcd_rst>;
+               reset-gpios = <&gpio4 RK_PA0 GPIO_ACTIVE_LOW>;
+               vdd-supply = <&vcc3v3_lcd0_n>;
+
+               port {
+                       mipi_in_panel: endpoint {
+                               remote-endpoint = <&mipi_out_panel>;
+                       };
+               };
+       };
+};
+
 &gpio_keys_control {
        button-a {
                gpios = <&gpio3 RK_PC2 GPIO_ACTIVE_LOW>;
@@ -55,6 +97,22 @@
        };
 };
 
+&pinctrl {
+       gpio-lcd {
+               lcd_rst: lcd-rst {
+                       rockchip,pins =
+                               <4 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
+               };
+       };
+};
+
 &pwm4 {
        status = "okay";
 };
+
+&vp1 {
+       vp1_out_dsi0: endpoint@ROCKCHIP_VOP2_EP_MIPI0 {
+               reg = <ROCKCHIP_VOP2_EP_MIPI0>;
+               remote-endpoint = <&dsi0_in_vp1>;
+       };
+};