*
****************************************************************************/
-int up_hardfault(int irq, FAR void *context)
+int up_hardfault(int irq, FAR void *context, FAR void *arg)
{
#if defined(CONFIG_DEBUG_HARDFAULT) || !defined(CONFIG_ARMV7M_USEBASEPRI)
uint32_t *regs = (uint32_t *)context;
if (insn == INSN_SVC0) {
hfdbg("Forward SVCall\n");
- return up_svcall(irq, context);
+ return up_svcall(irq, context, arg);
}
}
#endif
*
****************************************************************************/
-int up_memfault(int irq, FAR void *context)
+int up_memfault(int irq, FAR void *context, FAR void *arg)
{
/* Dump some memory management fault info */
*
****************************************************************************/
-int up_svcall(int irq, FAR void *context)
+int up_svcall(int irq, FAR void *context, FAR void *arg)
{
uint32_t *regs = (uint32_t *)context;
uint32_t cmd;
#ifdef CONFIG_SMP
/* Attach SGI interrupt handlers */
- DEBUGVERIFY(irq_attach(GIC_IRQ_SGI1, arm_start_handler));
- DEBUGVERIFY(irq_attach(GIC_IRQ_SGI2, arm_pause_handler));
+ DEBUGVERIFY(irq_attach(GIC_IRQ_SGI1, arm_start_handler, NULL));
+ DEBUGVERIFY(irq_attach(GIC_IRQ_SGI2, arm_pause_handler, NULL));
#endif
}
****************************************************************************/
#ifdef CONFIG_SMP
-int arm_start_handler(int irq, FAR void *context);
+int arm_start_handler(int irq, FAR void *context, FAR void *arg);
#endif
/****************************************************************************
****************************************************************************/
#ifdef CONFIG_SMP
-int arm_pause_handler(int irq, FAR void *context);
+int arm_pause_handler(int irq, FAR void *context, FAR void *arg);
#endif
#undef EXTERN
/* Exception Handlers */
-int up_svcall(int irq, FAR void *context);
-int up_hardfault(int irq, FAR void *context);
+int up_svcall(int irq, FAR void *context, FAR void *arg);
+int up_hardfault(int irq, FAR void *context, FAR void *arg);
#if defined(CONFIG_ARCH_CORTEXM3) || defined(CONFIG_ARCH_CORTEXM4)
-int up_memfault(int irq, FAR void *context);
+int up_memfault(int irq, FAR void *context, FAR void *arg);
#endif /* CONFIG_ARCH_CORTEXM3 || CONFIG_ARCH_CORTEXM4 */
static void *__gpio_eint_get_addr(int gpio, unsigned offset);
static void s5j_gpio_callback_wqueue(FAR void *arg);
static void s5j_gpio_poll_expiry(int argc, uint32_t arg, ...);
-static int s5j_gpio_irq_handler(int irq, void *context);
+static int s5j_gpio_irq_handler(int irq, void *context, void *arg);
static void s5j_gpio_enable_irq(struct gpio_dev_s *dev);
static void s5j_gpio_disable_irq(struct gpio_dev_s *dev);
static u32 gpio_get_irq_id(int gpio);
* -1, if Error
*
****************************************************************************/
-static int s5j_gpio_irq_handler(int irq, void *context)
+static int s5j_gpio_irq_handler(int irq, void *context, void *arg)
{
int i;
struct gpio_dev_s *dev;
gpio_eint_unmask(gpio);
irq = gpio_to_bank(gpio)->isr_num[s5j_gpio_port(gpio)];
- (void)irq_attach(irq, (xcpt_t)s5j_gpio_irq_handler);
+ (void)irq_attach(irq, (xcpt_t)s5j_gpio_irq_handler, NULL);
up_enable_irq(irq);
}
hsi2c_set_trans_mode(priv->config->base, 0, 0);
#ifdef CONFIG_S5J_I2C_INTERRUPT_MODE
if ((priv->master == I2C_SLAVE_MODE) || (priv->mode == I2C_INTERRUPT)) {
- irq_attach(priv->config->irq, priv->config->isr);
+ irq_attach(priv->config->irq, priv->config->isr, NULL);
}
#endif
#endif
}
-static int s5j_i2c0_interrupt(int irq, void *context)
+static int s5j_i2c0_interrupt(int irq, void *context, void *arg)
{
struct s5j_i2c_priv_s *priv;
return hsi2c_master_handler(priv);
}
-static int s5j_i2c1_interrupt(int irq, void *context)
+static int s5j_i2c1_interrupt(int irq, void *context, void *arg)
{
struct s5j_i2c_priv_s *priv;
return hsi2c_master_handler(priv);
}
-static int s5j_i2c2_interrupt(int irq, void *context)
+static int s5j_i2c2_interrupt(int irq, void *context, void *arg)
{
struct s5j_i2c_priv_s *priv;
return hsi2c_master_handler(priv);
}
-static int s5j_i2c3_interrupt(int irq, void *context)
+static int s5j_i2c3_interrupt(int irq, void *context, void *arg)
{
struct s5j_i2c_priv_s *priv;
#ifdef CONFIG_S5J_I2C_INTERRUPT_MODE
if ((priv->master == I2C_SLAVE_MODE) || (priv->mode == I2C_INTERRUPT)) {
- irq_attach(config->irq, config->isr);
+ irq_attach(config->irq, config->isr, NULL);
up_enable_irq(config->irq);
}
#endif
uintptr_t base; /* I2C base address */
unsigned int scl_pin; /* GPIO configuration for SCL as SCL */
unsigned int sda_pin; /* GPIO configuration for SDA as SDA */
- int (*isr)(int, void *); /* Interrupt handler */
+ int (*isr)(int, void *, void *); /* Interrupt handler */
unsigned int irq; /* IRQ number */
uint8_t devno; /* I2Cn where n = devno */
};
static inline void s5j_i2c_sem_init(struct s5j_i2c_priv_s *priv);
static inline void s5j_i2c_sem_destroy(struct s5j_i2c_priv_s *priv);
static int s5j_i2c_interrupt(struct s5j_i2c_priv_s *priv, unsigned int status);
-static int s5j_i2c0_interrupt(int irq, void *context);
-static int s5j_i2c1_interrupt(int irq, void *context);
-static int s5j_i2c2_interrupt(int irq, void *context);
-static int s5j_i2c3_interrupt(int irq, void *context);
+static int s5j_i2c0_interrupt(int irq, void *context, void *arg);
+static int s5j_i2c1_interrupt(int irq, void *context, void *arg);
+static int s5j_i2c2_interrupt(int irq, void *context, void *arg);
+static int s5j_i2c3_interrupt(int irq, void *context, void *arg);
static int s5j_i2c_initialize(struct s5j_i2c_priv_s *priv, unsigned int frequency);
static int s5j_i2c_uninitialize(struct s5j_i2c_priv_s *priv);
/****************************************************************************
* Static Function Prototypes
****************************************************************************/
+
/****************************************************************************
* Private Data
****************************************************************************/
* Zero on success; a negated errno value on failure
*
****************************************************************************/
-static int s5j_pwm_timer_interrupt(int irq, void *context)
+static int s5j_pwm_timer_interrupt(int irq, void *context, void *arg)
{
signed int pwm_no;
signed int irq_no;
/* There is only 6 IRQ ID (PWM0_0 ~ PWM1_1 */
if (timer < TOTAL_NUMBER_OF_PWMOUT) {
/* IRQ register */
- irq_attach(lower->irq, s5j_pwm_timer_interrupt);
+ irq_attach(lower->irq, s5j_pwm_timer_interrupt, NULL);
up_disable_irq(lower->irq);
/* IRQ trigger = level */
};
static int s5j_pwm_interrupt(struct s5j_pwmtimer_s *priv);
-static int s5j_pwm_timer_interrupt(int irq, void *context);
+static int s5j_pwm_timer_interrupt(int irq, void *context, void *arg);
static int s5j_pwm_setup(FAR struct pwm_lowerhalf_s *dev);
static int s5j_pwm_shutdown(FAR struct pwm_lowerhalf_s *dev);
#ifdef CONFIG_PWM_PULSECOUNT
static int s5j_rtc_aiealarm(FAR struct rtc_lowerhalf_s *lower, bool enable)
{
if (enable) {
- irq_attach(IRQ_TOP_RTC_ALARM, (xcpt_t) __isr_rtc_alarm);
+ irq_attach(IRQ_TOP_RTC_ALARM, (xcpt_t) __isr_rtc_alarm, NULL);
up_enable_irq(IRQ_TOP_RTC_ALARM);
HW_REG32(S5J_RTC_BASE, RTCALM) |= RTC_GLB_ALM_EN; /* Enable Alarm Global */
static int s5j_rtc_enable_tickirq(FAR struct rtc_lowerhalf_s *lower, bool enable)
{
if (enable) {
- irq_attach(IRQ_TOP_RTC_TIC, (xcpt_t) __isr_rtc_tick);
+ irq_attach(IRQ_TOP_RTC_TIC, (xcpt_t) __isr_rtc_tick, NULL);
up_enable_irq(IRQ_TOP_RTC_TIC);
HW_REG32(S5J_RTC_BASE, RTCCON) |= RTCCON_TICEN; /* Enable Tick Timer */
#ifdef CONFIG_RTC_ALARM
- irq_attach(IRQ_TOP_RTC_ALARM, (xcpt_t) __isr_rtc_alarm);
+ irq_attach(IRQ_TOP_RTC_ALARM, (xcpt_t) __isr_rtc_alarm, NULL);
up_enable_irq(IRQ_TOP_RTC_ALARM);
/* Set Alarm after 1 min */
static void up_shutdown(struct uart_dev_s *dev);
static int up_attach(struct uart_dev_s *dev);
static void up_detach(struct uart_dev_s *dev);
-static int up_interrupt(int irq, void *context);
+static int up_interrupt(int irq, void *context, void *arg);
static int up_ioctl(struct file *filep, int cmd, unsigned long arg);
static int up_receive(struct uart_dev_s *dev, uint32_t *status);
static void up_rxint(struct uart_dev_s *dev, bool enable);
/* Attach and enable the IRQ */
- ret = irq_attach(priv->irq, up_interrupt);
+ ret = irq_attach(priv->irq, up_interrupt, NULL);
if (ret == OK) {
/* Enable the interrupt (RX and TX interrupts are still disabled
* in the UART
*
****************************************************************************/
-static int up_interrupt(int irq, void *context)
+static int up_interrupt(int irq, void *context, void *arg)
{
struct uart_dev_s *dev = NULL;
struct up_dev_s *priv;
* of the systems.
*
****************************************************************************/
-int up_timerisr(int irq, uint32_t *regs)
+int up_timerisr(int irq, uint32_t *regs, void *arg)
{
/* Reset timer */
s5j_mct_clear_pending(MCT_L0);
s5j_mct_local_start_timer(MCT_L0);
/* Attach the timer interrupt vector */
- irq_attach(IRQ_MCT_L0, (xcpt_t) up_timerisr);
+ irq_attach(IRQ_MCT_L0, (xcpt_t) up_timerisr, NULL);
/* Enable the timer interrupt */
up_enable_irq(IRQ_MCT_L0);
if (irqhandler == NULL) {
up_disable_irq(IRQ_EINT0);
- irq_attach(IRQ_EINT0, NULL);
+ irq_attach(IRQ_EINT0, NULL, NULL);
return oldhandler;
}
- if (irq_attach(IRQ_EINT0, irqhandler) == OK) {
+ if (irq_attach(IRQ_EINT0, irqhandler, NULL) == OK) {
up_enable_irq(IRQ_EINT0);
} else {
/* TO DO: How can it contolled ? */
#endif
static void enc_pktif(FAR struct enc_driver_s *priv);
static void enc_irqworker(FAR void *arg);
-static int enc_interrupt(int irq, FAR void *context);
+static int enc_interrupt(int irq, FAR void *context, FAR void *arg);
/* Watchdog timer expirations */
static void enc_toworker(FAR void *arg);
* Assumptions:
*
****************************************************************************/
-static int enc_interrupt(int irq, FAR void *context)
+static int enc_interrupt(int irq, FAR void *context, FAR void *arg)
{
register FAR struct enc_driver_s *priv = &g_enc28j60[0];
****************************************************************************/
static int phy_handler(FAR struct phy_notify_s *client);
-static int phy_handler_0(int irq, FAR void *context);
+static int phy_handler_0(int irq, FAR void *context, FAR void *arg);
#if CONFIG_PHY_NOTIFICATION_NCLIENTS > 1
-static int phy_handler_1(int irq, FAR void *context);
+static int phy_handler_1(int irq, FAR void *context, FAR void *arg);
#if CONFIG_PHY_NOTIFICATION_NCLIENTS > 2
-static int phy_handler_2(int irq, FAR void *context);
+static int phy_handler_2(int irq, FAR void *context, FAR void *arg);
#if CONFIG_PHY_NOTIFICATION_NCLIENTS > 3
-static int phy_handler_3(int irq, FAR void *context);
+static int phy_handler_3(int irq, FAR void *context, FAR void *arg);
#endif
#endif
#endif
* Name: phy_handler_0, phy_handler_1, ...
****************************************************************************/
-static int phy_handler_0(int irq, FAR void *context)
+static int phy_handler_0(int irq, FAR void *context, FAR void *arg)
{
return phy_handler(&g_notify_clients[0]);
}
#if CONFIG_PHY_NOTIFICATION_NCLIENTS > 1
-static int phy_handler_1(int irq, FAR void *context)
+static int phy_handler_1(int irq, FAR void *context, FAR void *arg)
{
return phy_handler(&g_notify_clients[1]);
}
#endif
#if CONFIG_PHY_NOTIFICATION_NCLIENTS > 2
-static int phy_handler_2(int irq, FAR void *context)
+static int phy_handler_2(int irq, FAR void *context, FAR void *arg)
{
return phy_handler(&g_notify_clients[2]);
}
#endif
#if CONFIG_PHY_NOTIFICATION_NCLIENTS > 3
-static int phy_handler_3(int irq, FAR void *context)
+static int phy_handler_3(int irq, FAR void *context, FAR void *arg)
{
return phy_handler(&g_notify_clients[3]);
}
}
#endif
-static void uart_irq_handler_sercomm(__unused enum irq_nr irqnr, __unused void *context)
+static void uart_irq_handler_sercomm(__unused enum irq_nr irqnr, __unused void *context, void *arg)
{
const uint8_t uart = SERCOMM_UART_NR;
uint8_t iir, ch;
if (uart == SERCOMM_UART_NR) {
sercomm_init();
- irq_attach(IRQ_UART_MODEM, (xcpt_t)uart_irq_handler_sercomm);
+ irq_attach(IRQ_UART_MODEM, (xcpt_t)uart_irq_handler_sercomm, NULL);
up_enable_irq(IRQ_UART_MODEM);
uart_irq_enable(uart, UART_IRQ_RX_CHAR, 1);
}
} else
#endif
{
- uart_irq_handler_sercomm(0, NULL);
+ uart_irq_handler_sercomm(0, NULL, NULL);
}
}
static int u16550_attach(struct uart_dev_s *dev);
static void u16550_detach(struct uart_dev_s *dev);
#ifndef CONFIG_SUPPRESS_SERIAL_INTS
-static int u16550_interrupt(int irq, void *context);
+static int u16550_interrupt(int irq, void *context, void *arg);
#endif
static int u16550_ioctl(struct file *filep, int cmd, unsigned long arg);
static int u16550_receive(struct uart_dev_s *dev, uint32_t *status);
/* Attach and enable the IRQ */
- ret = irq_attach(priv->irq, u16550_interrupt);
+ ret = irq_attach(priv->irq, u16550_interrupt, NULL);
#ifndef CONFIG_ARCH_NOINTC
if (ret == OK) {
/* Enable the interrupt (RX and TX interrupts are still disabled
****************************************************************************/
#ifndef CONFIG_SUPPRESS_SERIAL_INTS
-static int u16550_interrupt(int irq, void *context)
+static int u16550_interrupt(int irq, void *context, void *arg)
{
struct uart_dev_s *dev = NULL;
struct u16550_s *priv;
*/
#ifndef __ASSEMBLY__
-#define irq_detach(isr) irq_attach(isr, NULL)
+#define irq_detach(isr) irq_attach(isr, NULL, NULL)
#endif
/****************************************************************************
/* This struct defines the way the registers are stored */
#ifndef __ASSEMBLY__
-typedef int (*xcpt_t)(int irq, FAR void *context);
+typedef int (*xcpt_t)(int irq, FAR void *context, FAR void *arg);
#endif
/* Now include architecture-specific types */
*
* Description:
* Configure the IRQ subsystem so that IRQ number 'irq' is dispatched to
- * 'isr'
+ * 'isr' with argument 'arg'
*
****************************************************************************/
-int irq_attach(int irq, xcpt_t isr);
+int irq_attach(int irq, xcpt_t isr, FAR void *arg);
#undef EXTERN
#ifdef __cplusplus
* Public Type Declarations
****************************************************************************/
-extern FAR xcpt_t g_irqvector[NR_IRQS + 1];
+struct irq {
+ xcpt_t handler;
+ FAR void *arg;
+};
+
+extern struct irq g_irqvector[NR_IRQS + 1];
/****************************************************************************
* Public Variables
#endif
void weak_function irq_initialize(void);
-int irq_unexpected_isr(int irq, FAR void *context);
+int irq_unexpected_isr(int irq, FAR void *context, FAR void *arg);
#undef EXTERN
#ifdef __cplusplus
*
****************************************************************************/
-int irq_attach(int irq, xcpt_t isr)
+int irq_attach(int irq, xcpt_t isr, FAR void *arg)
{
#if NR_IRQS > 0
int ret = ERROR;
*/
isr = irq_unexpected_isr;
+ arg = NULL;
}
/* Save the new ISR in the table. */
- g_irqvector[irq] = isr;
+ g_irqvector[irq].handler = isr;
+ g_irqvector[irq].arg = arg;
irqrestore(state);
ret = OK;
}
void irq_dispatch(int irq, FAR void *context)
{
xcpt_t vector;
+ FAR void *arg;
/* Perform some sanity checks */
#if NR_IRQS > 0
- if ((unsigned)irq >= NR_IRQS || g_irqvector[irq] == NULL) {
+ if ((unsigned)irq >= NR_IRQS || g_irqvector[irq].handler == NULL) {
vector = irq_unexpected_isr;
+ arg = NULL;
} else {
- vector = g_irqvector[irq];
+ vector = g_irqvector[irq].handler;
+ arg = g_irqvector[irq].arg;
}
#else
vector = irq_unexpected_isr;
/* Then dispatch to the interrupt handler */
- vector(irq, context);
+ vector(irq, context, arg);
}
* Global Variables
****************************************************************************/
-FAR xcpt_t g_irqvector[NR_IRQS + 1];
+struct irq g_irqvector[NR_IRQS + 1];
/****************************************************************************
* Private Variables
/* Point all interrupt vectors to the unexpected interrupt */
for (i = 0; i < NR_IRQS; i++) {
- g_irqvector[i] = irq_unexpected_isr;
+ g_irqvector[i].handler = irq_unexpected_isr;
+ g_irqvector[i].arg = NULL;
}
}
*
****************************************************************************/
-int irq_unexpected_isr(int irq, FAR void *context)
+int irq_unexpected_isr(int irq, FAR void *context, FAR void *arg)
{
(void)irqsave();
lldbg("irq: %d\n", irq);