uart1 {
pinctrl_uart1: uart1-0 {
atmel,pins =
- <AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB20 periph A with pullup */
- AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB21 periph A */
+ <AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
};
pinctrl_uart1_rts: uart1_rts-0 {
uart2 {
pinctrl_uart2: uart2-0 {
atmel,pins =
- <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA22 periph A */
- AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA23 periph A with pullup */
+ <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
+ AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
};
pinctrl_uart2_rts: uart2_rts-0 {
uart3 {
pinctrl_uart3: uart3-0 {
atmel,pins =
- <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA5 periph B with pullup */
- AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA6 periph B */
+ <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE
+ AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
};
pinctrl_uart3_rts: uart3_rts-0 {
usart1 {
pinctrl_usart1: usart1-0 {
atmel,pins =
- <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB6 periph A with pullup */
- AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB7 periph A */
+ <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
};
pinctrl_usart1_rts: usart1_rts-0 {
usart2 {
pinctrl_usart2: usart2-0 {
atmel,pins =
- <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB8 periph A with pullup */
- AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB9 periph A */
+ <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
};
pinctrl_usart2_rts: usart2_rts-0 {
usart3 {
pinctrl_usart3: usart3-0 {
atmel,pins =
- <AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB10 periph A with pullup */
- AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB11 periph A */
+ <AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
};
pinctrl_usart3_rts: usart3_rts-0 {
uart0 {
pinctrl_uart0: uart0-0 {
atmel,pins =
- <AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA31 periph B with pullup */
- AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA30 periph B */
+ <AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_NONE
+ AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
};
};
uart1 {
pinctrl_uart1: uart1-0 {
atmel,pins =
- <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB12 periph A with pullup */
- AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB13 periph A */
+ <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
};
};
usart0 {
pinctrl_usart0: usart0-0 {
atmel,pins =
- <AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
- <AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ <AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE>,
+ <AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
};
pinctrl_usart0_rts: usart0_rts-0 {
usart1 {
pinctrl_usart1: usart1-0 {
atmel,pins =
- <AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
- <AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ <AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_NONE>,
+ <AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
};
pinctrl_usart1_rts: usart1_rts-0 {
usart2 {
pinctrl_usart2: usart2-0 {
atmel,pins =
- <AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
- <AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ <AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE>,
+ <AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
};
pinctrl_usart2_rts: usart2_rts-0 {
usart0 {
pinctrl_usart0: usart0-0 {
atmel,pins =
- <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA26 periph A with pullup */
- AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA27 periph A */
+ <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
};
pinctrl_usart0_rts: usart0_rts-0 {
usart1 {
pinctrl_usart1: usart1-0 {
atmel,pins =
- <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD0 periph A with pullup */
- AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD1 periph A */
+ <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
};
pinctrl_usart1_rts: usart1_rts-0 {
usart2 {
pinctrl_usart2: usart2-0 {
atmel,pins =
- <AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD2 periph A with pullup */
- AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD3 periph A */
+ <AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
};
pinctrl_usart2_rts: usart2_rts-0 {
usart0 {
pinctrl_usart0: usart0-0 {
atmel,pins =
- <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB19 periph A with pullup */
- AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A */
+ <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
};
pinctrl_usart0_rts: usart0_rts-0 {
uart1 {
pinctrl_usart1: usart1-0 {
atmel,pins =
- <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB4 periph A with pullup */
- AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB5 periph A */
+ <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
};
pinctrl_usart1_rts: usart1_rts-0 {
usart2 {
pinctrl_usart2: usart2-0 {
atmel,pins =
- <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB6 periph A with pullup */
- AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB7 periph A */
+ <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
};
pinctrl_usart2_rts: usart2_rts-0 {
usart3 {
pinctrl_usart3: usart3-0 {
atmel,pins =
- <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB9 periph A with pullup */
- AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB8 periph A */
+ <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
};
pinctrl_usart3_rts: usart3_rts-0 {
uart1 {
pinctrl_uart1: uart1-0 {
atmel,pins =
- <AT91_PIOC 16 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* PC17 periph C with pullup */
- AT91_PIOC 17 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC16 periph C */
+ <AT91_PIOC 16 AT91_PERIPH_C AT91_PINCTRL_NONE
+ AT91_PIOC 17 AT91_PERIPH_C AT91_PINCTRL_PULL_UP>;
};
};
usart1 {
pinctrl_usart1: usart1-0 {
atmel,pins =
- <AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
- <AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ <AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE>,
+ <AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
};
pinctrl_usart1_rts: usart1_rts-0 {
usart2 {
pinctrl_usart2: usart2-0 {
atmel,pins =
- <AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
- <AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ <AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>,
+ <AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
};
pinctrl_usart2_rts: usart2_rts-0 {
usart3 {
pinctrl_usart3: usart3-0 {
atmel,pins =
- <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
- <AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE>,
+ <AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
};
pinctrl_usart3_rts: usart3_rts-0 {
usart0 {
pinctrl_usart0: usart0-0 {
atmel,pins =
- <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA0 periph A with pullup */
- AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA1 periph A */
+ <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
};
pinctrl_usart0_rts: usart0_rts-0 {
usart1 {
pinctrl_usart1: usart1-0 {
atmel,pins =
- <AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA5 periph A with pullup */
- AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA6 periph A */
+ <AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
};
pinctrl_usart1_rts: usart1_rts-0 {
usart2 {
pinctrl_usart2: usart2-0 {
atmel,pins =
- <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
- AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA8 periph A */
+ <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
};
pinctrl_usart2_rts: usart2_rts-0 {
usart3 {
pinctrl_usart3: usart3-0 {
atmel,pins =
- <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PC22 periph B with pullup */
- AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC23 periph B */
+ <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE
+ AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
};
pinctrl_usart3_rts: usart3_rts-0 {
uart0 {
pinctrl_uart0: uart0-0 {
atmel,pins =
- <AT91_PIOC 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* conflicts with PWMFI2, ISI_D8 */
- AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* conflicts with ISI_PCK */
+ <AT91_PIOC 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* conflicts with PWMFI2, ISI_D8 */
+ AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* conflicts with ISI_PCK */
};
};
uart1 {
pinctrl_uart1: uart1-0 {
atmel,pins =
- <AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE /* conflicts with TWD0, ISI_VSYNC */
- AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* conflicts with TWCK0, ISI_HSYNC */
+ <AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* conflicts with TWD0, ISI_VSYNC */
+ AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with TWCK0, ISI_HSYNC */
};
};
usart0 {
pinctrl_usart0: usart0-0 {
atmel,pins =
- <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD17 periph A */
- AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD18 periph A with pullup */
+ <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
+ AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_NONE>;
};
pinctrl_usart0_rts_cts: usart0_rts_cts-0 {
usart1 {
pinctrl_usart1: usart1-0 {
atmel,pins =
- <AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB28 periph A */
- AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB29 periph A with pullup */
+ <AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
+ AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
};
pinctrl_usart1_rts_cts: usart1_rts_cts-0 {
usart2 {
pinctrl_usart2: usart2-0 {
atmel,pins =
- <AT91_PIOE 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE25 periph B, conflicts with A25 */
- AT91_PIOE 26 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PE26 periph B with pullup, conflicts NCS0 */
+ <AT91_PIOE 25 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* conflicts with A25 */
+ AT91_PIOE 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts NCS0 */
};
pinctrl_usart2_rts_cts: usart2_rts_cts-0 {
usart3 {
pinctrl_usart3: usart3-0 {
atmel,pins =
- <AT91_PIOE 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE18 periph B, conflicts with A18 */
- AT91_PIOE 19 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PE19 periph B with pullup, conflicts with A19 */
+ <AT91_PIOE 18 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* conflicts with A18 */
+ AT91_PIOE 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with A19 */
};
pinctrl_usart3_rts_cts: usart3_rts_cts-0 {
uart0 {
pinctrl_uart0: uart0-0 {
atmel,pins =
- <AT91_PIOC 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC29 periph A, conflicts with PWMFI2, ISI_D8 */
- AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PC30 periph A with pullup, conflicts with ISI_PCK */
+ <AT91_PIOC 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* conflicts with PWMFI2, ISI_D8 */
+ AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* conflicts with ISI_PCK */
};
};
uart1 {
pinctrl_uart1: uart1-0 {
atmel,pins =
- <AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA30 periph B, conflicts with TWD0, ISI_VSYNC */
- AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA31 periph B with pullup, conflicts with TWCK0, ISI_HSYNC */
+ <AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* conflicts with TWD0, ISI_VSYNC */
+ AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with TWCK0, ISI_HSYNC */
};
};
};
uart0 {
pinctrl_uart0: uart0-0 {
atmel,pins =
- <AT91_PIOE 29 AT91_PERIPH_B AT91_PINCTRL_NONE /* RXD */
- AT91_PIOE 30 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* TXD */
+ <AT91_PIOE 29 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* RXD */
+ AT91_PIOE 30 AT91_PERIPH_B AT91_PINCTRL_NONE /* TXD */
>;
};
};
uart1 {
pinctrl_uart1: uart1-0 {
atmel,pins =
- <AT91_PIOC 25 AT91_PERIPH_C AT91_PINCTRL_NONE /* RXD */
- AT91_PIOC 26 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* TXD */
+ <AT91_PIOC 25 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* RXD */
+ AT91_PIOC 26 AT91_PERIPH_C AT91_PINCTRL_NONE /* TXD */
>;
};
};
usart0 {
pinctrl_usart0: usart0-0 {
atmel,pins =
- <AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* RXD */
- AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* TXD */
+ <AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* RXD */
+ AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* TXD */
>;
};
pinctrl_usart0_rts: usart0_rts-0 {
usart1 {
pinctrl_usart1: usart1-0 {
atmel,pins =
- <AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* RXD */
- AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* TXD */
+ <AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* RXD */
+ AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* TXD */
>;
};
pinctrl_usart1_rts: usart1_rts-0 {
usart2 {
pinctrl_usart2: usart2-0 {
atmel,pins =
- <AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* RXD - conflicts with G0_CRS, ISI_HSYNC */
- AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* TXD - conflicts with G0_COL, PCK2 */
+ <AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* RXD - conflicts with G0_CRS, ISI_HSYNC */
+ AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE /* TXD - conflicts with G0_COL, PCK2 */
>;
};
pinctrl_usart2_rts: usart2_rts-0 {
usart3 {
pinctrl_usart3: usart3-0 {
atmel,pins =
- <AT91_PIOE 16 AT91_PERIPH_B AT91_PINCTRL_NONE /* RXD */
- AT91_PIOE 17 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* TXD */
+ <AT91_PIOE 16 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* RXD */
+ AT91_PIOE 17 AT91_PERIPH_B AT91_PINCTRL_NONE /* TXD */
>;
};
};
usart4 {
pinctrl_usart4: usart4-0 {
atmel,pins =
- <AT91_PIOE 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* RXD */
- AT91_PIOE 27 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* TXD */
+ <AT91_PIOE 26 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* RXD */
+ AT91_PIOE 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* TXD */
>;
};
pinctrl_usart4_rts: usart4_rts-0 {