powerpc: io: implement dummy relaxed accessor macros for writes
authorWill Deacon <will.deacon@arm.com>
Wed, 4 Sep 2013 10:34:08 +0000 (11:34 +0100)
committerWill Deacon <will.deacon@arm.com>
Mon, 20 Oct 2014 17:49:18 +0000 (18:49 +0100)
write{b,w,l,q}_relaxed are implemented by some architectures in order to
permit memory-mapped I/O accesses with weaker barrier semantics than the
non-relaxed variants.

This patch adds dummy macros for the write accessors to powerpc, in the
same vein as the dummy definitions for the relaxed read accessors.

Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
arch/powerpc/include/asm/io.h

index 97d3869..9eaf301 100644 (file)
@@ -617,10 +617,14 @@ static inline void name at                                        \
 /*
  * We don't do relaxed operations yet, at least not with this semantic
  */
-#define readb_relaxed(addr) readb(addr)
-#define readw_relaxed(addr) readw(addr)
-#define readl_relaxed(addr) readl(addr)
-#define readq_relaxed(addr) readq(addr)
+#define readb_relaxed(addr)    readb(addr)
+#define readw_relaxed(addr)    readw(addr)
+#define readl_relaxed(addr)    readl(addr)
+#define readq_relaxed(addr)    readq(addr)
+#define writeb_relaxed(v, addr)        writeb(v, addr)
+#define writew_relaxed(v, addr)        writew(v, addr)
+#define writel_relaxed(v, addr)        writel(v, addr)
+#define writeq_relaxed(v, addr)        writeq(v, addr)
 
 #ifdef CONFIG_PPC32
 #define mmiowb()