static U32 s_invalid_begin = 0;
-BOOL xgi_ge_irq_handler(struct xgi_info * info)
+bool xgi_ge_irq_handler(struct xgi_info * info)
{
volatile U8 *mmio_vbase = info->mmio.vbase;
volatile U32 *ge_3d_status = (volatile U32 *)(mmio_vbase + 0x2800);
U32 int_status = ge_3d_status[4]; // interrupt status
U32 auto_reset_count = 0;
- BOOL is_support_auto_reset = FALSE;
+ bool is_support_auto_reset = FALSE;
// Check GE on/off
if (0 == (0xffffc0f0 & int_status)) {
ge_3d_status[0x04] = int_status | 0x04000000;
if (TRUE == is_support_auto_reset) {
- BOOL is_wrong_signal = FALSE;
+ bool is_wrong_signal = FALSE;
static U32 last_int_tick_low,
last_int_tick_high;
static U32 new_int_tick_low;
return FALSE;
}
-BOOL xgi_crt_irq_handler(struct xgi_info * info)
+bool xgi_crt_irq_handler(struct xgi_info * info)
{
- BOOL ret = FALSE;
+ bool ret = FALSE;
U8 save_3ce = bReadReg(0x3ce);
if (bIn3cf(0x37) & 0x01) // CRT1 interrupt just happened
return (ret);
}
-BOOL xgi_dvi_irq_handler(struct xgi_info * info)
+bool xgi_dvi_irq_handler(struct xgi_info * info)
{
- BOOL ret = FALSE;
+ bool ret = FALSE;
U8 save_3ce = bReadReg(0x3ce);
if (bIn3cf(0x38) & 0x20) // DVI interrupt just happened
extern int xgi_get_cpu_id(struct cpu_info *arg);
extern void xgi_restore_registers(struct xgi_info * info);
-extern BOOL xgi_ge_irq_handler(struct xgi_info * info);
-extern BOOL xgi_crt_irq_handler(struct xgi_info * info);
-extern BOOL xgi_dvi_irq_handler(struct xgi_info * info);
+extern bool xgi_ge_irq_handler(struct xgi_info * info);
+extern bool xgi_crt_irq_handler(struct xgi_info * info);
+extern bool xgi_dvi_irq_handler(struct xgi_info * info);
extern void xgi_waitfor_pci_idle(struct xgi_info * info);
#endif
typedef unsigned char U8; /* 0 to 255 */
typedef unsigned short U16; /* 0 to 65535 */
-typedef unsigned long BOOL;
/*
* mainly for 64-bit linux, where long is 64 bits
* and win9x, where int is 16 bit.