pinctrl: sh-pfc: r8a7795-es1: Use generic IOCTRL register description

Move R-Car H3 ES1.x I/O voltage support over to the generic way to
describe IOCTRL registers, which will be needed for suspend/resume
support.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c b/drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c
index 714bb3749a27ec99fad2c142c97afe1d8fab5672..1d4d84f34d6043d0f0c6fd3081c7e5d00aeacf8a 100644 (file)
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c
@@ -5423,12 +5423,21 @@ static const struct pinmux_drive_reg pinmux_drive_regs[] = {
        { },
 };
 
+enum ioctrl_regs {
+       POCCTRL,
+};
+
+static const struct pinmux_ioctrl_reg pinmux_ioctrl_regs[] = {
+       [POCCTRL] = { 0xe6060380, },
+       { /* sentinel */ },
+};
+
 static int r8a7795es1_pin_to_pocctrl(struct sh_pfc *pfc, unsigned int pin,
                                     u32 *pocctrl)
 {
        int bit = -EINVAL;
 
-       *pocctrl = 0xe6060380;
+       *pocctrl = pinmux_ioctrl_regs[POCCTRL].reg;
 
        if (pin >= RCAR_GP_PIN(3, 0) && pin <= RCAR_GP_PIN(3, 11))
                bit = pin & 0x1f;
@@ -5745,6 +5754,7 @@ const struct sh_pfc_soc_info r8a7795es1_pinmux_info = {
        .cfg_regs = pinmux_config_regs,
        .drive_regs = pinmux_drive_regs,
        .bias_regs = pinmux_bias_regs,
+       .ioctrl_regs = pinmux_ioctrl_regs,
 
        .pinmux_data = pinmux_data,
        .pinmux_data_size = ARRAY_SIZE(pinmux_data),