arm64: KVM: Add ARCH_WORKAROUND_2 discovery through ARCH_FEATURES_FUNC_ID
authorMarc Zyngier <marc.zyngier@arm.com>
Tue, 29 May 2018 12:11:18 +0000 (13:11 +0100)
committerCatalin Marinas <catalin.marinas@arm.com>
Thu, 31 May 2018 17:00:59 +0000 (18:00 +0100)
Now that all our infrastructure is in place, let's expose the
availability of ARCH_WORKAROUND_2 to guests. We take this opportunity
to tidy up a couple of SMCCC constants.

Acked-by: Christoffer Dall <christoffer.dall@arm.com>
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
arch/arm/include/asm/kvm_host.h
arch/arm64/include/asm/kvm_host.h
arch/arm64/kvm/reset.c
virt/kvm/arm/psci.c

index c7c28c8..7001fb8 100644 (file)
@@ -315,6 +315,18 @@ static inline bool kvm_arm_harden_branch_predictor(void)
        return false;
 }
 
+#define KVM_SSBD_UNKNOWN               -1
+#define KVM_SSBD_FORCE_DISABLE         0
+#define KVM_SSBD_KERNEL                1
+#define KVM_SSBD_FORCE_ENABLE          2
+#define KVM_SSBD_MITIGATED             3
+
+static inline int kvm_arm_have_ssbd(void)
+{
+       /* No way to detect it yet, pretend it is not there. */
+       return KVM_SSBD_UNKNOWN;
+}
+
 static inline void kvm_vcpu_load_sysregs(struct kvm_vcpu *vcpu) {}
 static inline void kvm_vcpu_put_sysregs(struct kvm_vcpu *vcpu) {}
 
index 9bef3f6..95d8a0e 100644 (file)
@@ -455,6 +455,29 @@ static inline bool kvm_arm_harden_branch_predictor(void)
        return cpus_have_const_cap(ARM64_HARDEN_BRANCH_PREDICTOR);
 }
 
+#define KVM_SSBD_UNKNOWN               -1
+#define KVM_SSBD_FORCE_DISABLE         0
+#define KVM_SSBD_KERNEL                1
+#define KVM_SSBD_FORCE_ENABLE          2
+#define KVM_SSBD_MITIGATED             3
+
+static inline int kvm_arm_have_ssbd(void)
+{
+       switch (arm64_get_ssbd_state()) {
+       case ARM64_SSBD_FORCE_DISABLE:
+               return KVM_SSBD_FORCE_DISABLE;
+       case ARM64_SSBD_KERNEL:
+               return KVM_SSBD_KERNEL;
+       case ARM64_SSBD_FORCE_ENABLE:
+               return KVM_SSBD_FORCE_ENABLE;
+       case ARM64_SSBD_MITIGATED:
+               return KVM_SSBD_MITIGATED;
+       case ARM64_SSBD_UNKNOWN:
+       default:
+               return KVM_SSBD_UNKNOWN;
+       }
+}
+
 void kvm_vcpu_load_sysregs(struct kvm_vcpu *vcpu);
 void kvm_vcpu_put_sysregs(struct kvm_vcpu *vcpu);
 
index 3256b92..a74311b 100644 (file)
@@ -122,6 +122,10 @@ int kvm_reset_vcpu(struct kvm_vcpu *vcpu)
        /* Reset PMU */
        kvm_pmu_vcpu_reset(vcpu);
 
+       /* Default workaround setup is enabled (if supported) */
+       if (kvm_arm_have_ssbd() == KVM_SSBD_KERNEL)
+               vcpu->arch.workaround_flags |= VCPU_WORKAROUND_2_FLAG;
+
        /* Reset timer */
        return kvm_timer_vcpu_reset(vcpu);
 }
index c4762be..c95ab4c 100644 (file)
@@ -405,7 +405,7 @@ static int kvm_psci_call(struct kvm_vcpu *vcpu)
 int kvm_hvc_call_handler(struct kvm_vcpu *vcpu)
 {
        u32 func_id = smccc_get_function(vcpu);
-       u32 val = PSCI_RET_NOT_SUPPORTED;
+       u32 val = SMCCC_RET_NOT_SUPPORTED;
        u32 feature;
 
        switch (func_id) {
@@ -417,7 +417,21 @@ int kvm_hvc_call_handler(struct kvm_vcpu *vcpu)
                switch(feature) {
                case ARM_SMCCC_ARCH_WORKAROUND_1:
                        if (kvm_arm_harden_branch_predictor())
-                               val = 0;
+                               val = SMCCC_RET_SUCCESS;
+                       break;
+               case ARM_SMCCC_ARCH_WORKAROUND_2:
+                       switch (kvm_arm_have_ssbd()) {
+                       case KVM_SSBD_FORCE_DISABLE:
+                       case KVM_SSBD_UNKNOWN:
+                               break;
+                       case KVM_SSBD_KERNEL:
+                               val = SMCCC_RET_SUCCESS;
+                               break;
+                       case KVM_SSBD_FORCE_ENABLE:
+                       case KVM_SSBD_MITIGATED:
+                               val = SMCCC_RET_NOT_REQUIRED;
+                               break;
+                       }
                        break;
                }
                break;