drm/amdkfd: Update hardware scheduling time quanta

Update PROCESS_QUANTUM, the time the hardware scheduler allows
processes to run before switching to other processes when it becomes
over-subscribed. Increase this to 10ms, to allow processes to better
amortize their task switch times.

Update HQD Quantum, the amount of time that an active queue stays
attached to the CP before we forcibly switch it for another active
queue for fairness.

Setting these so that HQD < PROCESS makes it easier to ensure that
we get fairness when we have multiple active queues on the device.
Otherwise we may start process-swapping before we get to all the
queues in a CP.

Signed-off-by: Joseph Greathouse <Joseph.Greathouse@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v10.c b/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v10.c
index d1d68a5..18e08d8 100644 (file)
--- a/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v10.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v10.c
@@ -113,7 +113,7 @@ static void init_mqd(struct mqd_manager *mm, void **mqd,
 
        m->cp_hqd_quantum = 1 << CP_HQD_QUANTUM__QUANTUM_EN__SHIFT |
                        1 << CP_HQD_QUANTUM__QUANTUM_SCALE__SHIFT |
-                       10 << CP_HQD_QUANTUM__QUANTUM_DURATION__SHIFT;
+                       1 << CP_HQD_QUANTUM__QUANTUM_DURATION__SHIFT;
 
        if (q->format == KFD_QUEUE_FORMAT_AQL) {
                m->cp_hqd_aql_control =

diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c b/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c
index 48cda30..3b6f596 100644 (file)
--- a/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c
@@ -160,7 +160,7 @@ static void init_mqd(struct mqd_manager *mm, void **mqd,
 
        m->cp_hqd_quantum = 1 << CP_HQD_QUANTUM__QUANTUM_EN__SHIFT |
                        1 << CP_HQD_QUANTUM__QUANTUM_SCALE__SHIFT |
-                       10 << CP_HQD_QUANTUM__QUANTUM_DURATION__SHIFT;
+                       1 << CP_HQD_QUANTUM__QUANTUM_DURATION__SHIFT;
 
        if (q->format == KFD_QUEUE_FORMAT_AQL) {
                m->cp_hqd_aql_control =

diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_vi.c b/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_vi.c
index a5e8ff1..31799e5 100644 (file)
--- a/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_vi.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_vi.c
@@ -117,7 +117,7 @@ static void init_mqd(struct mqd_manager *mm, void **mqd,
 
        m->cp_hqd_quantum = 1 << CP_HQD_QUANTUM__QUANTUM_EN__SHIFT |
                        1 << CP_HQD_QUANTUM__QUANTUM_SCALE__SHIFT |
-                       10 << CP_HQD_QUANTUM__QUANTUM_DURATION__SHIFT;
+                       1 << CP_HQD_QUANTUM__QUANTUM_DURATION__SHIFT;
 
        set_priority(m, q);
        m->cp_hqd_eop_rptr = 1 << CP_HQD_EOP_RPTR__INIT_FETCHER__SHIFT;

diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_packet_manager_v9.c b/drivers/gpu/drm/amd/amdkfd/kfd_packet_manager_v9.c
index bdca9dc..dfaf771 100644 (file)
--- a/drivers/gpu/drm/amd/amdkfd/kfd_packet_manager_v9.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_packet_manager_v9.c
@@ -39,7 +39,7 @@ static int pm_map_process_v9(struct packet_manager *pm,
        packet->header.u32All = pm_build_pm4_header(IT_MAP_PROCESS,
                                        sizeof(struct pm4_mes_map_process));
        packet->bitfields2.diq_enable = (qpd->is_debug) ? 1 : 0;
-       packet->bitfields2.process_quantum = 1;
+       packet->bitfields2.process_quantum = 10;
        packet->bitfields2.pasid = qpd->pqm->process->pasid;
        packet->bitfields14.gds_size = qpd->gds_size & 0x3F;
        packet->bitfields14.gds_size_hi = (qpd->gds_size >> 6) & 0xF;

diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_packet_manager_vi.c b/drivers/gpu/drm/amd/amdkfd/kfd_packet_manager_vi.c
index bed4d0c..a852e0d 100644 (file)
--- a/drivers/gpu/drm/amd/amdkfd/kfd_packet_manager_vi.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_packet_manager_vi.c
@@ -50,7 +50,7 @@ static int pm_map_process_vi(struct packet_manager *pm, uint32_t *buffer,
        packet->header.u32All = pm_build_pm4_header(IT_MAP_PROCESS,
                                        sizeof(struct pm4_mes_map_process));
        packet->bitfields2.diq_enable = (qpd->is_debug) ? 1 : 0;
-       packet->bitfields2.process_quantum = 1;
+       packet->bitfields2.process_quantum = 10;
        packet->bitfields2.pasid = qpd->pqm->process->pasid;
        packet->bitfields3.page_table_base = qpd->page_table_base;
        packet->bitfields10.gds_size = qpd->gds_size;