MIPS: BCM63XX: move the HSSPI PLL HZ into its own clock

Split up the HSSPL clock into rate and a gate clock, to more closely
match the actual hardware.

Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Kevin Cernekee <cernekee@gmail.com>
Cc: Russell King <linux@armlinux.org.uk>
Cc: linux-mips@linux-mips.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-serial@vger.kernel.org
Cc: devicetree@vger.kernel.org
Cc: bcm-kernel-feedback-list@broadcom.com
Patchwork: https://patchwork.linux-mips.org/patch/17330/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: James Hogan <jhogan@kernel.org>

diff --git a/arch/mips/bcm63xx/clk.c b/arch/mips/bcm63xx/clk.c
index d8dac1f..ba57585 100644 (file)
--- a/arch/mips/bcm63xx/clk.c
+++ b/arch/mips/bcm63xx/clk.c
@@ -248,6 +248,10 @@ static struct clk clk_hsspi = {
        .set    = hsspi_set,
 };
 
+/*
+ * HSSPI PLL
+ */
+static struct clk clk_hsspi_pll;
 
 /*
  * XTM clock
@@ -380,6 +384,7 @@ static struct clk_lookup bcm6328_clks[] = {
        CLKDEV_INIT(NULL, "periph", &clk_periph),
        CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
        CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
+       CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
        /* gated clocks */
        CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
        CLKDEV_INIT(NULL, "usbh", &clk_usbh),
@@ -447,6 +452,7 @@ static struct clk_lookup bcm6362_clks[] = {
        CLKDEV_INIT(NULL, "periph", &clk_periph),
        CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
        CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
+       CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
        /* gated clocks */
        CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
        CLKDEV_INIT(NULL, "usbh", &clk_usbh),
@@ -481,7 +487,7 @@ static int __init bcm63xx_clk_init(void)
                clkdev_add_table(bcm3368_clks, ARRAY_SIZE(bcm3368_clks));
                break;
        case BCM6328_CPU_ID:
-               clk_hsspi.rate = HSSPI_PLL_HZ_6328;
+               clk_hsspi_pll.rate = HSSPI_PLL_HZ_6328;
                clkdev_add_table(bcm6328_clks, ARRAY_SIZE(bcm6328_clks));
                break;
        case BCM6338_CPU_ID:
@@ -497,7 +503,7 @@ static int __init bcm63xx_clk_init(void)
                clkdev_add_table(bcm6358_clks, ARRAY_SIZE(bcm6358_clks));
                break;
        case BCM6362_CPU_ID:
-               clk_hsspi.rate = HSSPI_PLL_HZ_6362;
+               clk_hsspi_pll.rate = HSSPI_PLL_HZ_6362;
                clkdev_add_table(bcm6362_clks, ARRAY_SIZE(bcm6362_clks));
                break;
        case BCM6368_CPU_ID: