arm64: dts: rockchip: remove interrupt-names from iommu nodes
authorJohan Jonker <jbx6244@gmail.com>
Sun, 11 Jul 2021 14:34:30 +0000 (16:34 +0200)
committerHeiko Stuebner <heiko@sntech.de>
Wed, 15 Sep 2021 15:50:09 +0000 (17:50 +0200)
The iommu driver gets the interrupts by platform_get_irq(),
so remove interrupt-names property from iommu nodes.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20210711143430.14347-2-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
arch/arm64/boot/dts/rockchip/rk3328.dtsi
arch/arm64/boot/dts/rockchip/rk3368.dtsi
arch/arm64/boot/dts/rockchip/rk3399.dtsi

index 8c821ac..becc1c6 100644 (file)
                compatible = "rockchip,iommu";
                reg = <0x0 0xff330200 0 0x100>;
                interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
-               interrupt-names = "h265e_mmu";
                clocks = <&cru ACLK_H265>, <&cru PCLK_H265>;
                clock-names = "aclk", "iface";
                #iommu-cells = <0>;
                compatible = "rockchip,iommu";
                reg = <0x0 0xff340800 0x0 0x40>;
                interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
-               interrupt-names = "vepu_mmu";
                clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
                clock-names = "aclk", "iface";
                #iommu-cells = <0>;
                compatible = "rockchip,iommu";
                reg = <0x0 0xff350800 0x0 0x40>;
                interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
-               interrupt-names = "vpu_mmu";
                clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
                clock-names = "aclk", "iface";
                #iommu-cells = <0>;
                compatible = "rockchip,iommu";
                reg = <0x0 0xff360480 0x0 0x40>, <0x0 0xff3604c0 0x0 0x40>;
                interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
-               interrupt-names = "rkvdec_mmu";
                clocks = <&cru ACLK_RKVDEC>, <&cru HCLK_RKVDEC>;
                clock-names = "aclk", "iface";
                #iommu-cells = <0>;
                compatible = "rockchip,iommu";
                reg = <0x0 0xff373f00 0x0 0x100>;
                interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
-               interrupt-names = "vop_mmu";
                clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>;
                clock-names = "aclk", "iface";
                #iommu-cells = <0>;
index 4c64fbe..4217897 100644 (file)
                compatible = "rockchip,iommu";
                reg = <0x0 0xff900800 0x0 0x100>;
                interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
-               interrupt-names = "iep_mmu";
                clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>;
                clock-names = "aclk", "iface";
                #iommu-cells = <0>;
                reg = <0x0 0xff914000 0x0 0x100>,
                      <0x0 0xff915000 0x0 0x100>;
                interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
-               interrupt-names = "isp_mmu";
                clocks = <&cru ACLK_ISP>, <&cru HCLK_ISP>;
                clock-names = "aclk", "iface";
                #iommu-cells = <0>;
                compatible = "rockchip,iommu";
                reg = <0x0 0xff930300 0x0 0x100>;
                interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
-               interrupt-names = "vop_mmu";
                clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>;
                clock-names = "aclk", "iface";
                #iommu-cells = <0>;
                reg = <0x0 0xff9a0440 0x0 0x40>,
                      <0x0 0xff9a0480 0x0 0x40>;
                interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
-               interrupt-names = "hevc_mmu";
                clocks = <&cru ACLK_VIDEO>, <&cru HCLK_VIDEO>;
                clock-names = "aclk", "iface";
                #iommu-cells = <0>;
                reg = <0x0 0xff9a0800 0x0 0x100>;
                interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
                             <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
-               interrupt-names = "vepu_mmu", "vdpu_mmu";
                clocks = <&cru ACLK_VIDEO>, <&cru HCLK_VIDEO>;
                clock-names = "aclk", "iface";
                #iommu-cells = <0>;
index 3871c7f..aa5d7dc 100644 (file)
                reg = <0x0 0xff650000 0x0 0x800>;
                interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH 0>,
                             <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH 0>;
-               interrupt-names = "vepu", "vdpu";
                clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>;
                clock-names = "aclk", "hclk";
                iommus = <&vpu_mmu>;
                compatible = "rockchip,iommu";
                reg = <0x0 0xff650800 0x0 0x40>;
                interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH 0>;
-               interrupt-names = "vpu_mmu";
                clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>;
                clock-names = "aclk", "iface";
                #iommu-cells = <0>;
                compatible = "rockchip,iommu";
                reg = <0x0 0xff660480 0x0 0x40>, <0x0 0xff6604c0 0x0 0x40>;
                interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH 0>;
-               interrupt-names = "vdec_mmu";
                clocks = <&cru ACLK_VDU>, <&cru HCLK_VDU>;
                clock-names = "aclk", "iface";
                power-domains = <&power RK3399_PD_VDU>;
                compatible = "rockchip,iommu";
                reg = <0x0 0xff670800 0x0 0x40>;
                interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH 0>;
-               interrupt-names = "iep_mmu";
                clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>;
                clock-names = "aclk", "iface";
                #iommu-cells = <0>;
                compatible = "rockchip,iommu";
                reg = <0x0 0xff8f3f00 0x0 0x100>;
                interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH 0>;
-               interrupt-names = "vopl_mmu";
                clocks = <&cru ACLK_VOP1>, <&cru HCLK_VOP1>;
                clock-names = "aclk", "iface";
                power-domains = <&power RK3399_PD_VOPL>;
                compatible = "rockchip,iommu";
                reg = <0x0 0xff903f00 0x0 0x100>;
                interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH 0>;
-               interrupt-names = "vopb_mmu";
                clocks = <&cru ACLK_VOP0>, <&cru HCLK_VOP0>;
                clock-names = "aclk", "iface";
                power-domains = <&power RK3399_PD_VOPB>;
                compatible = "rockchip,iommu";
                reg = <0x0 0xff914000 0x0 0x100>, <0x0 0xff915000 0x0 0x100>;
                interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH 0>;
-               interrupt-names = "isp0_mmu";
                clocks = <&cru ACLK_ISP0_WRAPPER>, <&cru HCLK_ISP0_WRAPPER>;
                clock-names = "aclk", "iface";
                #iommu-cells = <0>;
                compatible = "rockchip,iommu";
                reg = <0x0 0xff924000 0x0 0x100>, <0x0 0xff925000 0x0 0x100>;
                interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH 0>;
-               interrupt-names = "isp1_mmu";
                clocks = <&cru ACLK_ISP1_WRAPPER>, <&cru HCLK_ISP1_WRAPPER>;
                clock-names = "aclk", "iface";
                #iommu-cells = <0>;