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ARM: tegra: Add SOR0_OUT clock on Tegra124
author
Thierry Reding
<treding@nvidia.com>
Wed, 24 Jul 2019 13:47:54 +0000
(15:47 +0200)
committer
Thierry Reding
<treding@nvidia.com>
Tue, 29 Oct 2019 19:29:14 +0000
(20:29 +0100)
This clock is needed for eDP to properly function, so add it to the SOR
device tree node.
Signed-off-by: Thierry Reding <treding@nvidia.com>
arch/arm/boot/dts/tegra124.dtsi
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diff --git
a/arch/arm/boot/dts/tegra124.dtsi
b/arch/arm/boot/dts/tegra124.dtsi
index
b113e47
..
413bfb9
100644
(file)
--- a/
arch/arm/boot/dts/tegra124.dtsi
+++ b/
arch/arm/boot/dts/tegra124.dtsi
@@
-157,10
+157,11
@@
reg = <0x0 0x54540000 0x0 0x00040000>;
interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA124_CLK_SOR0>,
+ <&tegra_car TEGRA124_CLK_SOR0_OUT>,
<&tegra_car TEGRA124_CLK_PLL_D_OUT0>,
<&tegra_car TEGRA124_CLK_PLL_DP>,
<&tegra_car TEGRA124_CLK_CLK_M>;
- clock-names = "sor", "parent", "dp", "safe";
+ clock-names = "sor", "
out", "
parent", "dp", "safe";
resets = <&tegra_car 182>;
reset-names = "sor";
status = "disabled";