Renaming of Logical_AND op to LogicalAnd (#3800)

To maintain uniformity and naming convention,
This patch renames the Logical_AND to LogicalAnd

Signed-off-by: shubham <shub98.gupta@samsung.com>

diff --git a/runtimes/pure_arm_compute/src/compilation.cc b/runtimes/pure_arm_compute/src/compilation.cc
index 31d5c97..44a4aa0 100644 (file)
--- a/runtimes/pure_arm_compute/src/compilation.cc
+++ b/runtimes/pure_arm_compute/src/compilation.cc
@@ -549,7 +549,6 @@ public:
   void visit(const ::internal::tflite::op::Floor::Node &node) override;
   void visit(const ::internal::tflite::op::Split::Node &node) override;
   void visit(const ::internal::tflite::op::ArgMax::Node &node) override;
-  void visit(const ::internal::tflite::op::Logical_AND::Node &node) override;
   void visit(const ::internal::tflite::op::RSQRT::Node &node) override;
   void visit(const ::internal::tflite::op::SQRT::Node &node) override;
   void visit(const ::internal::tflite::op::Pad::Node &node) override;
@@ -573,6 +572,7 @@ public:
   void visit(const ::internal::tflite::op::Pack::Node &node) override;
   void visit(const ::internal::tflite::op::Abs::Node &node) override;
   void visit(const ::internal::tflite::op::NotEqual::Node &node) override;
+  void visit(const ::internal::tflite::op::LogicalAnd::Node &node) override;
   void visit(const ::internal::tflite::op::LogicalNot::Node &node) override;
   void visit(const ::internal::tflite::op::LogicalOr::Node &node) override;
 
@@ -3675,13 +3675,6 @@ void Planner::visit(const ::internal::tflite::op::SQRT::Node &node)
   _builder.addStage(stage);
 }
 
-void Planner::visit(const ::internal::tflite::op::Logical_AND::Node &node)
-{
-  VERBOSE(Logical_AND) << "Configure Logical_AND operation" << std::endl;
-
-  throw std::runtime_error("Not supported, yet");
-}
-
 void Planner::visit(const ::internal::tflite::op::RSQRT::Node &node)
 {
   VERBOSE(RSQRT) << "Configure Rsqrt operation" << std::endl;
@@ -5378,6 +5371,14 @@ void Planner::visit(const ::internal::tflite::op::NotEqual::Node &node)
   _builder.addStage(stage);
 }
 
+void Planner::visit(const ::internal::tflite::op::LogicalAnd::Node &node)
+{
+  VERBOSE(Logical_AND) << "Configure Logical_AND operation" << std::endl;
+
+  // TODO Implement LogicalAnd op
+  throw std::runtime_error("Not supported, yet");
+}
+
 void Planner::visit(const ::internal::tflite::op::LogicalNot::Node &node)
 {
   // TODO Implement LogicalNot op

diff --git a/runtimes/pure_arm_compute/src/internal/op/Logical_AND.cc b/runtimes/pure_arm_compute/src/internal/op/LogicalAnd.cc
similarity index 91%
rename from runtimes/pure_arm_compute/src/internal/op/Logical_AND.cc
rename to runtimes/pure_arm_compute/src/internal/op/LogicalAnd.cc
index 50905c6..5b7da4d 100644 (file)
--- a/runtimes/pure_arm_compute/src/internal/op/Logical_AND.cc
+++ b/runtimes/pure_arm_compute/src/internal/op/LogicalAnd.cc
@@ -14,7 +14,7 @@
  * limitations under the License.
  */
 
-#include "internal/op/Logical_AND.h"
+#include "internal/op/LogicalAnd.h"
 #include "internal/op/NodeVisitor.h"
 
 #include <cassert>
@@ -25,12 +25,12 @@ namespace tflite
 {
 namespace op
 {
-namespace Logical_AND
+namespace LogicalAnd
 {
 
 void Node::accept(NodeVisitor &&v) const { v.visit(*this); }
 
-} // namespace Logical_AND
+} // namespace LogicalAnd
 } // namespace op
 } // namespace tflite
 } // namespace internal
@@ -41,7 +41,7 @@ namespace tflite
 {
 namespace op
 {
-namespace Logical_AND
+namespace LogicalAnd
 {
 
 Param::Param(uint32_t inputCount, const uint32_t *inputs, uint32_t outputCount,
@@ -59,7 +59,7 @@ Param::Param(uint32_t inputCount, const uint32_t *inputs, uint32_t outputCount,
   input2_index = inputs[1];
 }
 
-} // namespace Logical_AND
+} // namespace LogicalAnd
 } // namespace op
 } // namespace tflite
 } // namespace internal

diff --git a/runtimes/pure_arm_compute/src/internal/op/Logical_AND.h b/runtimes/pure_arm_compute/src/internal/op/LogicalAnd.h
similarity index 94%
rename from runtimes/pure_arm_compute/src/internal/op/Logical_AND.h
rename to runtimes/pure_arm_compute/src/internal/op/LogicalAnd.h
index 23a9e9f..2f53f75 100644 (file)
--- a/runtimes/pure_arm_compute/src/internal/op/Logical_AND.h
+++ b/runtimes/pure_arm_compute/src/internal/op/LogicalAnd.h
@@ -27,7 +27,7 @@ namespace tflite
 {
 namespace op
 {
-namespace Logical_AND
+namespace LogicalAnd
 {
 
 struct Param
@@ -41,7 +41,7 @@ struct Param
   Param(uint32_t inputCount, const uint32_t *inputs, uint32_t outputCount, const uint32_t *outputs);
 };
 
-} // namespace Logical_AND
+} // namespace LogicalAnd
 } // namespace op
 } // namespace tflite
 } // namespace internal
@@ -52,7 +52,7 @@ namespace tflite
 {
 namespace op
 {
-namespace Logical_AND
+namespace LogicalAnd
 {
 class Node final : public op::Node
 {
@@ -75,7 +75,7 @@ private:
   const Param _param;
 };
 
-} // namespace Logical_AND
+} // namespace LogicalAnd
 } // namespace op
 } // namespace tflite
 } // namespace internal

diff --git a/runtimes/pure_arm_compute/src/internal/op/NodeVisitor.h b/runtimes/pure_arm_compute/src/internal/op/NodeVisitor.h
index 1d2db66..0c1a400 100644 (file)
--- a/runtimes/pure_arm_compute/src/internal/op/NodeVisitor.h
+++ b/runtimes/pure_arm_compute/src/internal/op/NodeVisitor.h
@@ -75,11 +75,11 @@
 #include "internal/op/ReduceSum.h"
 #include "internal/op/Equal.h"
 #include "internal/op/BatchToSpaceNd.h"
-#include "internal/op/Logical_AND.h"
 #include "internal/op/TransposeConv.h"
 #include "internal/op/Pack.h"
 #include "internal/op/Abs.h"
 #include "internal/op/NotEqual.h"
+#include "internal/op/LogicalAnd.h"
 #include "internal/op/LogicalNot.h"
 #include "internal/op/LogicalOr.h"
 
@@ -339,12 +339,6 @@ struct NodeVisitor
    * @param[in] node SQRT node to visit
    * @return N/A
    */
-  virtual void visit(const Logical_AND::Node &) = 0;
-  /**
-   * @brief Visit a Logical_AND node
-   * @param[in] node Logical_AND node to visit
-   * @return N/A
-   */
   virtual void visit(const SQRT::Node &) = 0;
   /**
    * @brief Visit a Pad node
@@ -473,6 +467,12 @@ struct NodeVisitor
    */
   virtual void visit(const NotEqual::Node &) = 0;
   /**
+   * @brief Visit a LogicalAnd node
+   * @param[in] node LogicalAnd node to visit
+   * @return N/A
+   */
+  virtual void visit(const LogicalAnd::Node &) = 0;
+  /**
    * @brief Visit a LogicalNot node
    * @param[in] node LogicalNot node to visit
    * @return N/A

diff --git a/runtimes/pure_arm_compute/src/model.cc b/runtimes/pure_arm_compute/src/model.cc
index c44da82..a144b26 100644 (file)
--- a/runtimes/pure_arm_compute/src/model.cc
+++ b/runtimes/pure_arm_compute/src/model.cc
@@ -800,8 +800,8 @@ int ANeuralNetworksModel_addOperationEx(ANeuralNetworksModel *model,
     }
     case ANEURALNETWORKS_LOGICAL_AND_EX:
     {
-      using internal::tflite::op::Logical_AND::Param;
-      using internal::tflite::op::Logical_AND::Node;
+      using internal::tflite::op::LogicalAnd::Param;
+      using internal::tflite::op::LogicalAnd::Node;
 
       // Add 'operations'
       auto &operations = model->deref().operations();