dmaengine: ti: k3-psil: add additional TX threads for j7200
authorMatt Ranostay <mranostay@ti.com>
Mon, 19 Sep 2022 20:59:31 +0000 (13:59 -0700)
committerVinod Koul <vkoul@kernel.org>
Thu, 29 Sep 2022 16:18:09 +0000 (21:48 +0530)
Add matching PSI-L threads mapping for transmission DMA channels
on the J7200 platform.

Signed-off-by: Matt Ranostay <mranostay@ti.com>
Link: https://lore.kernel.org/r/20220919205931.8397-3-mranostay@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
drivers/dma/ti/k3-psil-j7200.c

index 5ea63ea..e3feff8 100644 (file)
@@ -143,6 +143,57 @@ static struct psil_ep j7200_src_ep_map[] = {
 
 /* PSI-L destination thread IDs, used for TX (DMA_MEM_TO_DEV) */
 static struct psil_ep j7200_dst_ep_map[] = {
+       /* PDMA_MCASP - McASP0-2 */
+       PSIL_PDMA_MCASP(0xc400),
+       PSIL_PDMA_MCASP(0xc401),
+       PSIL_PDMA_MCASP(0xc402),
+       /* PDMA_SPI_G0 - SPI0-3 */
+       PSIL_PDMA_XY_PKT(0xc600),
+       PSIL_PDMA_XY_PKT(0xc601),
+       PSIL_PDMA_XY_PKT(0xc602),
+       PSIL_PDMA_XY_PKT(0xc603),
+       PSIL_PDMA_XY_PKT(0xc604),
+       PSIL_PDMA_XY_PKT(0xc605),
+       PSIL_PDMA_XY_PKT(0xc606),
+       PSIL_PDMA_XY_PKT(0xc607),
+       PSIL_PDMA_XY_PKT(0xc608),
+       PSIL_PDMA_XY_PKT(0xc609),
+       PSIL_PDMA_XY_PKT(0xc60a),
+       PSIL_PDMA_XY_PKT(0xc60b),
+       PSIL_PDMA_XY_PKT(0xc60c),
+       PSIL_PDMA_XY_PKT(0xc60d),
+       PSIL_PDMA_XY_PKT(0xc60e),
+       PSIL_PDMA_XY_PKT(0xc60f),
+       /* PDMA_SPI_G1 - SPI4-7 */
+       PSIL_PDMA_XY_PKT(0xc610),
+       PSIL_PDMA_XY_PKT(0xc611),
+       PSIL_PDMA_XY_PKT(0xc612),
+       PSIL_PDMA_XY_PKT(0xc613),
+       PSIL_PDMA_XY_PKT(0xc614),
+       PSIL_PDMA_XY_PKT(0xc615),
+       PSIL_PDMA_XY_PKT(0xc616),
+       PSIL_PDMA_XY_PKT(0xc617),
+       PSIL_PDMA_XY_PKT(0xc618),
+       PSIL_PDMA_XY_PKT(0xc619),
+       PSIL_PDMA_XY_PKT(0xc61a),
+       PSIL_PDMA_XY_PKT(0xc61b),
+       PSIL_PDMA_XY_PKT(0xc61c),
+       PSIL_PDMA_XY_PKT(0xc61d),
+       PSIL_PDMA_XY_PKT(0xc61e),
+       PSIL_PDMA_XY_PKT(0xc61f),
+       /* PDMA_USART_G0 - UART0-1 */
+       PSIL_PDMA_XY_PKT(0xc700),
+       PSIL_PDMA_XY_PKT(0xc701),
+       /* PDMA_USART_G1 - UART2-3 */
+       PSIL_PDMA_XY_PKT(0xc702),
+       PSIL_PDMA_XY_PKT(0xc703),
+       /* PDMA_USART_G2 - UART4-9 */
+       PSIL_PDMA_XY_PKT(0xc704),
+       PSIL_PDMA_XY_PKT(0xc705),
+       PSIL_PDMA_XY_PKT(0xc706),
+       PSIL_PDMA_XY_PKT(0xc707),
+       PSIL_PDMA_XY_PKT(0xc708),
+       PSIL_PDMA_XY_PKT(0xc709),
        /* CPSW5 */
        PSIL_ETHERNET(0xca00),
        PSIL_ETHERNET(0xca01),
@@ -161,6 +212,22 @@ static struct psil_ep j7200_dst_ep_map[] = {
        PSIL_ETHERNET(0xf005),
        PSIL_ETHERNET(0xf006),
        PSIL_ETHERNET(0xf007),
+       /* MCU_PDMA_MISC_G0 - SPI0 */
+       PSIL_PDMA_XY_PKT(0xf100),
+       PSIL_PDMA_XY_PKT(0xf101),
+       PSIL_PDMA_XY_PKT(0xf102),
+       PSIL_PDMA_XY_PKT(0xf103),
+       /* MCU_PDMA_MISC_G1 - SPI1-2 */
+       PSIL_PDMA_XY_PKT(0xf200),
+       PSIL_PDMA_XY_PKT(0xf201),
+       PSIL_PDMA_XY_PKT(0xf202),
+       PSIL_PDMA_XY_PKT(0xf203),
+       PSIL_PDMA_XY_PKT(0xf204),
+       PSIL_PDMA_XY_PKT(0xf205),
+       PSIL_PDMA_XY_PKT(0xf206),
+       PSIL_PDMA_XY_PKT(0xf207),
+       /* MCU_PDMA_MISC_G2 - UART0 */
+       PSIL_PDMA_XY_PKT(0xf300),
        /* SA2UL */
        PSIL_SA2UL(0xf500, 1),
        PSIL_SA2UL(0xf501, 1),