platform: Allow platforms to specify heap size
authorAnup Patel <apatel@ventanamicro.com>
Mon, 17 Apr 2023 05:58:03 +0000 (11:28 +0530)
committerAnup Patel <anup@brainfault.org>
Mon, 5 Jun 2023 10:15:33 +0000 (15:45 +0530)
We extend struct sbi_platform and struct sbi_scratch to allow platforms
specify the heap size to the OpenSBI firmwares. The OpenSBI firmwares
will use this information to determine the location of heap and provide
heap base address in per-HART scratch space.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
firmware/fw_base.S
include/sbi/sbi_platform.h
include/sbi/sbi_scratch.h
platform/fpga/ariane/platform.c
platform/fpga/openpiton/platform.c
platform/generic/platform.c
platform/kendryte/k210/platform.c
platform/nuclei/ux600/platform.c
platform/template/platform.c

index e37df095845da36fe4f26a04403a47930d92ca6e..fff09e1365c87258b172d3dcb748bed3eabc762a 100644 (file)
@@ -255,20 +255,28 @@ _bss_zero:
        /* Preload HART details
         * s7 -> HART Count
         * s8 -> HART Stack Size
+        * s9 -> Heap Size
+        * s10 -> Heap Offset
         */
        lla     a4, platform
 #if __riscv_xlen > 32
        lwu     s7, SBI_PLATFORM_HART_COUNT_OFFSET(a4)
        lwu     s8, SBI_PLATFORM_HART_STACK_SIZE_OFFSET(a4)
+       lwu     s9, SBI_PLATFORM_HEAP_SIZE_OFFSET(a4)
 #else
        lw      s7, SBI_PLATFORM_HART_COUNT_OFFSET(a4)
        lw      s8, SBI_PLATFORM_HART_STACK_SIZE_OFFSET(a4)
+       lw      s9, SBI_PLATFORM_HEAP_SIZE_OFFSET(a4)
 #endif
 
        /* Setup scratch space for all the HARTs*/
        lla     tp, _fw_end
        mul     a5, s7, s8
        add     tp, tp, a5
+       /* Setup heap base address */
+       lla     s10, _fw_start
+       sub     s10, tp, s10
+       add     tp, tp, s9
        /* Keep a copy of tp */
        add     t3, tp, zero
        /* Counter */
@@ -283,8 +291,11 @@ _scratch_init:
         * t3 -> the firmware end address
         * s7 -> HART count
         * s8 -> HART stack size
+        * s9 -> Heap Size
+        * s10 -> Heap Offset
         */
        add     tp, t3, zero
+       sub     tp, tp, s9
        mul     a5, s8, t1
        sub     tp, tp, a5
        li      a5, SBI_SCRATCH_SIZE
@@ -302,6 +313,10 @@ _scratch_init:
        REG_L   a5, 0(a4)
        REG_S   a5, SBI_SCRATCH_FW_RW_OFFSET(tp)
 
+       /* Store fw_heap_offset and fw_heap_size in scratch space */
+       REG_S   s10, SBI_SCRATCH_FW_HEAP_OFFSET(tp)
+       REG_S   s9, SBI_SCRATCH_FW_HEAP_SIZE_OFFSET(tp)
+
        /* Store next arg1 in scratch space */
        MOV_3R  s0, a0, s1, a1, s2, a2
        call    fw_next_arg1
index 546c0a61acb52f1f05333d92fc4f9bb264168eee..3e9616f6dafe04370393dcb541bafa163253121e 100644 (file)
 #define SBI_PLATFORM_HART_COUNT_OFFSET (0x50)
 /** Offset of hart_stack_size in struct sbi_platform */
 #define SBI_PLATFORM_HART_STACK_SIZE_OFFSET (0x54)
+/** Offset of heap_size in struct sbi_platform */
+#define SBI_PLATFORM_HEAP_SIZE_OFFSET (0x58)
+/** Offset of reserved in struct sbi_platform */
+#define SBI_PLATFORM_RESERVED_OFFSET (0x5c)
 /** Offset of platform_ops_addr in struct sbi_platform */
-#define SBI_PLATFORM_OPS_OFFSET (0x58)
+#define SBI_PLATFORM_OPS_OFFSET (0x60)
 /** Offset of firmware_context in struct sbi_platform */
-#define SBI_PLATFORM_FIRMWARE_CONTEXT_OFFSET (0x58 + __SIZEOF_POINTER__)
+#define SBI_PLATFORM_FIRMWARE_CONTEXT_OFFSET (0x60 + __SIZEOF_POINTER__)
 /** Offset of hart_index2id in struct sbi_platform */
-#define SBI_PLATFORM_HART_INDEX2ID_OFFSET (0x58 + (__SIZEOF_POINTER__ * 2))
+#define SBI_PLATFORM_HART_INDEX2ID_OFFSET (0x60 + (__SIZEOF_POINTER__ * 2))
 
 #define SBI_PLATFORM_TLB_RANGE_FLUSH_LIMIT_DEFAULT             (1UL << 12)
 
@@ -138,6 +142,10 @@ struct sbi_platform_operations {
 /** Platform default per-HART stack size for exception/interrupt handling */
 #define SBI_PLATFORM_DEFAULT_HART_STACK_SIZE   8192
 
+/** Platform default heap size */
+#define SBI_PLATFORM_DEFAULT_HEAP_SIZE(__num_hart)     \
+                                       (0x8000 + 0x800 * (__num_hart))
+
 /** Representation of a platform */
 struct sbi_platform {
        /**
@@ -160,6 +168,10 @@ struct sbi_platform {
        u32 hart_count;
        /** Per-HART stack size for exception/interrupt handling */
        u32 hart_stack_size;
+       /** Size of heap shared by all HARTs */
+       u32 heap_size;
+       /** Reserved for future use */
+       u32 reserved;
        /** Pointer to sbi platform operations */
        unsigned long platform_ops_addr;
        /** Pointer to system firmware specific context */
index 58f2d06b2d9c5967b3d4ca388ef283abbdd51d45..9894c704757803586121cdc4d09edb4854f2de1a 100644 (file)
 #define SBI_SCRATCH_FW_SIZE_OFFSET             (1 * __SIZEOF_POINTER__)
 /** Offset (in sbi_scratch) of the R/W Offset */
 #define SBI_SCRATCH_FW_RW_OFFSET               (2 * __SIZEOF_POINTER__)
+/** Offset of fw_heap_offset member in sbi_scratch */
+#define SBI_SCRATCH_FW_HEAP_OFFSET             (3 * __SIZEOF_POINTER__)
+/** Offset of fw_heap_size_offset member in sbi_scratch */
+#define SBI_SCRATCH_FW_HEAP_SIZE_OFFSET                (4 * __SIZEOF_POINTER__)
 /** Offset of next_arg1 member in sbi_scratch */
-#define SBI_SCRATCH_NEXT_ARG1_OFFSET           (3 * __SIZEOF_POINTER__)
+#define SBI_SCRATCH_NEXT_ARG1_OFFSET           (5 * __SIZEOF_POINTER__)
 /** Offset of next_addr member in sbi_scratch */
-#define SBI_SCRATCH_NEXT_ADDR_OFFSET           (4 * __SIZEOF_POINTER__)
+#define SBI_SCRATCH_NEXT_ADDR_OFFSET           (6 * __SIZEOF_POINTER__)
 /** Offset of next_mode member in sbi_scratch */
-#define SBI_SCRATCH_NEXT_MODE_OFFSET           (5 * __SIZEOF_POINTER__)
+#define SBI_SCRATCH_NEXT_MODE_OFFSET           (7 * __SIZEOF_POINTER__)
 /** Offset of warmboot_addr member in sbi_scratch */
-#define SBI_SCRATCH_WARMBOOT_ADDR_OFFSET       (6 * __SIZEOF_POINTER__)
+#define SBI_SCRATCH_WARMBOOT_ADDR_OFFSET       (8 * __SIZEOF_POINTER__)
 /** Offset of platform_addr member in sbi_scratch */
-#define SBI_SCRATCH_PLATFORM_ADDR_OFFSET       (7 * __SIZEOF_POINTER__)
+#define SBI_SCRATCH_PLATFORM_ADDR_OFFSET       (9 * __SIZEOF_POINTER__)
 /** Offset of hartid_to_scratch member in sbi_scratch */
-#define SBI_SCRATCH_HARTID_TO_SCRATCH_OFFSET   (8 * __SIZEOF_POINTER__)
+#define SBI_SCRATCH_HARTID_TO_SCRATCH_OFFSET   (10 * __SIZEOF_POINTER__)
 /** Offset of trap_exit member in sbi_scratch */
-#define SBI_SCRATCH_TRAP_EXIT_OFFSET           (9 * __SIZEOF_POINTER__)
+#define SBI_SCRATCH_TRAP_EXIT_OFFSET           (11 * __SIZEOF_POINTER__)
 /** Offset of tmp0 member in sbi_scratch */
-#define SBI_SCRATCH_TMP0_OFFSET                        (10 * __SIZEOF_POINTER__)
+#define SBI_SCRATCH_TMP0_OFFSET                        (12 * __SIZEOF_POINTER__)
 /** Offset of options member in sbi_scratch */
-#define SBI_SCRATCH_OPTIONS_OFFSET             (11 * __SIZEOF_POINTER__)
+#define SBI_SCRATCH_OPTIONS_OFFSET             (13 * __SIZEOF_POINTER__)
 /** Offset of extra space in sbi_scratch */
-#define SBI_SCRATCH_EXTRA_SPACE_OFFSET         (12 * __SIZEOF_POINTER__)
+#define SBI_SCRATCH_EXTRA_SPACE_OFFSET         (14 * __SIZEOF_POINTER__)
 /** Maximum size of sbi_scratch (4KB) */
 #define SBI_SCRATCH_SIZE                       (0x1000)
 
@@ -57,6 +61,10 @@ struct sbi_scratch {
        unsigned long fw_size;
        /** Offset (in bytes) of the R/W section */
        unsigned long fw_rw_offset;
+       /** Offset (in bytes) of the heap area */
+       unsigned long fw_heap_offset;
+       /** Size (in bytes) of the heap area */
+       unsigned long fw_heap_size;
        /** Arg1 (or 'a1' register) of next booting stage for this HART */
        unsigned long next_arg1;
        /** Address of next booting stage for this HART */
index 1e341c2049f35ccb1102979e926747dd5befc79b..975528f1372e15be029ac28ec43d9cef50807462 100644 (file)
@@ -185,5 +185,6 @@ const struct sbi_platform platform = {
        .features = SBI_PLATFORM_DEFAULT_FEATURES,
        .hart_count = ARIANE_HART_COUNT,
        .hart_stack_size = SBI_PLATFORM_DEFAULT_HART_STACK_SIZE,
+       .heap_size = SBI_PLATFORM_DEFAULT_HEAP_SIZE(ARIANE_HART_COUNT),
        .platform_ops_addr = (unsigned long)&platform_ops
 };
index 57ae698092440f9f7653f2c39dc242c12d5e1008..e59dc992fe3bec1d04674db961a56d2ef60327ad 100644 (file)
@@ -220,5 +220,7 @@ const struct sbi_platform platform = {
        .features = SBI_PLATFORM_DEFAULT_FEATURES,
        .hart_count = OPENPITON_DEFAULT_HART_COUNT,
        .hart_stack_size = SBI_PLATFORM_DEFAULT_HART_STACK_SIZE,
+       .heap_size =
+               SBI_PLATFORM_DEFAULT_HEAP_SIZE(OPENPITON_DEFAULT_HART_COUNT),
        .platform_ops_addr = (unsigned long)&platform_ops
 };
index eeefef4c953336f9d29ea43caa33b69bc3001ced..0c9cd95181731b7f41b69ebdd362a90aa2292926 100644 (file)
@@ -115,7 +115,7 @@ unsigned long fw_platform_init(unsigned long arg0, unsigned long arg1,
        }
 
        platform.hart_count = hart_count;
-
+       platform.heap_size = SBI_PLATFORM_DEFAULT_HEAP_SIZE(hart_count);
        platform_has_mlevel_imsic = fdt_check_imsic_mlevel(fdt);
 
        /* Return original FDT pointer */
@@ -315,5 +315,6 @@ struct sbi_platform platform = {
        .hart_count             = SBI_HARTMASK_MAX_BITS,
        .hart_index2id          = generic_hart_index2id,
        .hart_stack_size        = SBI_PLATFORM_DEFAULT_HART_STACK_SIZE,
+       .heap_size              = SBI_PLATFORM_DEFAULT_HEAP_SIZE(0),
        .platform_ops_addr      = (unsigned long)&platform_ops
 };
index 7eb9015bb85d15962c15d433468eee816fe265e9..637a217fcd7bdc3cbb97f3b82e4181ad964f53e4 100644 (file)
@@ -196,5 +196,7 @@ const struct sbi_platform platform = {
        .features               = 0,
        .hart_count             = K210_HART_COUNT,
        .hart_stack_size        = SBI_PLATFORM_DEFAULT_HART_STACK_SIZE,
+       .heap_size              =
+                       SBI_PLATFORM_DEFAULT_HEAP_SIZE(K210_HART_COUNT),
        .platform_ops_addr      = (unsigned long)&platform_ops
 };
index 4eccff15ee2dbcaa0a789d7bdd4aeaefcd0d2b5f..6fd6cd7082f0ff3803f0d381e943adde3127a41a 100644 (file)
@@ -244,5 +244,7 @@ const struct sbi_platform platform = {
        .features               = SBI_PLATFORM_DEFAULT_FEATURES,
        .hart_count             = UX600_HART_COUNT,
        .hart_stack_size        = SBI_PLATFORM_DEFAULT_HART_STACK_SIZE,
+       .heap_size              =
+                       SBI_PLATFORM_DEFAULT_HEAP_SIZE(UX600_HART_COUNT),
        .platform_ops_addr      = (unsigned long)&platform_ops
 };
index 8adc431f1ce85cd975b0973a41431c32543a9afc..86381ca2b7096802a9e1190149a68ca4cbd989fd 100644 (file)
@@ -152,5 +152,6 @@ const struct sbi_platform platform = {
        .features               = SBI_PLATFORM_DEFAULT_FEATURES,
        .hart_count             = 1,
        .hart_stack_size        = SBI_PLATFORM_DEFAULT_HART_STACK_SIZE,
+       .heap_size              = SBI_PLATFORM_DEFAULT_HEAP_SIZE(1),
        .platform_ops_addr      = (unsigned long)&platform_ops
 };