}
}
+void amvecm_clip_range_limit(bool limit_en)
+{
+ /*fix mbox av out flicker black dot*/
+ if (limit_en) {
+ /*cvbs output 16-235 16-240 16-240*/
+ WRITE_VPP_REG(VPP_CLIP_MISC0, 0x3acf03c0);
+ WRITE_VPP_REG(VPP_CLIP_MISC1, 0x4010040);
+ } else {
+ /*retore for other mode*/
+ WRITE_VPP_REG(VPP_CLIP_MISC0, 0x3fffffff);
+ WRITE_VPP_REG(VPP_CLIP_MISC1, 0x0);
+ }
+}
+EXPORT_SYMBOL(amvecm_clip_range_limit);
+
static void amvecm_pq_enable(int enable)
{
if (enable) {
#define VPP_POST_MATRIX_PRE_OFFSET2 0x32bc
#define VPP_POST_MATRIX_EN_CTRL 0x32bd
+#define VPP_POST_MATRIX_SAT 0x32c1
+
#define VPP_POST2_MATRIX_COEF00_01 0x39a0
#define VPP_POST2_MATRIX_COEF02_10 0x39a1
#define VPP_POST2_MATRIX_COEF11_12 0x39a2
VD2_IF0_LUMA_FIFO_SIZE + cur_dev->viu_off, 0x180);
}
- /*fix S905 av out flicker black dot*/
- if (is_meson_gxbb_cpu())
- SET_VCBUS_REG_MASK(VPP_MISC, VPP_OUT_SATURATE);
-
#if 0 /* if (0 >= VMODE_MAX) //DEBUG_TMP */
CLEAR_VCBUS_REG_MASK(VPP_VSC_PHASE_CTRL,
VPP_PHASECTL_TYPE_INTERLACE);
tvmode, info->vinfo->sync_duration_den,
info->vinfo->sync_duration_num);
+ /*set limit range for enci*/
+ amvecm_clip_range_limit(1);
if (mode & VMODE_INIT_BIT_MASK) {
cvbs_out_vpu_power_ctrl(1);
cvbs_out_clk_gate_ctrl(1);
info->dwork_flag = 0;
cvbs_cntl_output(0);
+ /*restore full range for encp/encl*/
+ amvecm_clip_range_limit(0);
+
cvbs_out_vpu_power_ctrl(0);
cvbs_out_clk_gate_ctrl(0);
const struct reg_s *enc_reg_setting;
};
+extern void amvecm_clip_range_limit(bool limit_en);
#endif
#define VPP_OSD_SCALE_COEF 0x1dcd
#define VPP_INT_LINE_NUM 0x1dce
+#define VPP_CLIP_MISC0 0x1dd9
+#define VPP_CLIP_MISC1 0x1dda
+
#define VPP2_MISC 0x1e26
#define VPP2_OFIFO_SIZE 0x1e27
#define VPP2_INT_LINE_NUM 0x1e20
#define SRSHARP1_SHARP_DNLP_EN 0x32c5
#define SRSHARP1_SHARP_SR2_CTRL 0x32d7
+#define VPP_POST_MATRIX_SAT 0x32c1
+
/* g12a vd2 pps */
#define VD2_SCALE_COEF_IDX 0x3943
#define VD2_SCALE_COEF 0x3944