powerpc: Make eh value more explicit when using lwarx
authorChristophe Leroy <christophe.leroy@csgroup.eu>
Tue, 2 Aug 2022 09:02:38 +0000 (11:02 +0200)
committerMichael Ellerman <mpe@ellerman.id.au>
Wed, 10 Aug 2022 05:32:20 +0000 (15:32 +1000)
Just like the first patch of this series, define a local 'eh' in order
to make the code clearer.

And IS_ENABLED() returns either 1 or 0 so no need to do
IS_ENABLED(CONFIG_PPC64) ? 1 : 0.

Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
[mpe: Use symbolic names, use 'n' constraint per Segher]
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/629befaa2d05e2922346e58a383886510d6af55a.1659430931.git.christophe.leroy@csgroup.eu
arch/powerpc/include/asm/atomic.h

index 853dc86..486ab78 100644 (file)
@@ -140,9 +140,10 @@ static __always_inline bool
 arch_atomic_try_cmpxchg_lock(atomic_t *v, int *old, int new)
 {
        int r, o = *old;
+       unsigned int eh = IS_ENABLED(CONFIG_PPC64);
 
        __asm__ __volatile__ (
-"1:    lwarx   %0,0,%2,%5      # atomic_try_cmpxchg_acquire            \n"
+"1:    lwarx   %0,0,%2,%[eh]   # atomic_try_cmpxchg_acquire            \n"
 "      cmpw    0,%0,%3                                                 \n"
 "      bne-    2f                                                      \n"
 "      stwcx.  %4,0,%2                                                 \n"
@@ -150,7 +151,7 @@ arch_atomic_try_cmpxchg_lock(atomic_t *v, int *old, int new)
 "\t"   PPC_ACQUIRE_BARRIER "                                           \n"
 "2:                                                                    \n"
        : "=&r" (r), "+m" (v->counter)
-       : "r" (&v->counter), "r" (o), "r" (new), "i" (IS_ENABLED(CONFIG_PPC64) ? 1 : 0)
+       : "r" (&v->counter), "r" (o), "r" (new), [eh] "n" (eh)
        : "cr0", "memory");
 
        if (unlikely(r != o))