drm/msm/devfreq: Restrict idle clamping to a618 for now
authorRob Clark <robdclark@chromium.org>
Mon, 18 Oct 2021 15:36:25 +0000 (08:36 -0700)
committerRob Clark <robdclark@chromium.org>
Mon, 18 Oct 2021 21:31:57 +0000 (14:31 -0700)
Until we better understand the stability issues caused by frequent
frequency changes, lets limit them to a618.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Tested-by: John Stultz <john.stultz@linaro.org>
Tested-by: Caleb Connolly <caleb.connolly@linaro.org>
Link: https://lore.kernel.org/r/20211018153627.2787882-1-robdclark@gmail.com
Signed-off-by: Rob Clark <robdclark@chromium.org>
drivers/gpu/drm/msm/adreno/a6xx_gpu.c
drivers/gpu/drm/msm/msm_gpu.h
drivers/gpu/drm/msm/msm_gpu_devfreq.c

index 33da25b..267a880 100644 (file)
@@ -1838,6 +1838,13 @@ struct msm_gpu *a6xx_gpu_init(struct drm_device *dev)
                        adreno_cmp_rev(ADRENO_REV(6, 3, 5, ANY_ID), info->rev)))
                adreno_gpu->base.hw_apriv = true;
 
+       /*
+        * For now only clamp to idle freq for devices where this is known not
+        * to cause power supply issues:
+        */
+       if (info && (info->revn == 618))
+               gpu->clamp_to_idle = true;
+
        a6xx_llc_slices_init(pdev, a6xx_gpu);
 
        ret = a6xx_set_supported_hw(&pdev->dev, config->rev);
index 030f82f..ee25d55 100644 (file)
@@ -203,6 +203,10 @@ struct msm_gpu {
        uint32_t suspend_count;
 
        struct msm_gpu_state *crashstate;
+
+       /* Enable clamping to idle freq when inactive: */
+       bool clamp_to_idle;
+
        /* True if the hardware supports expanded apriv (a650 and newer) */
        bool hw_apriv;
 
index 84e98c0..20006d0 100644 (file)
@@ -200,7 +200,8 @@ void msm_devfreq_idle(struct msm_gpu *gpu)
 
        idle_freq = get_freq(gpu);
 
-       msm_devfreq_target(&gpu->pdev->dev, &target_freq, 0);
+       if (gpu->clamp_to_idle)
+               msm_devfreq_target(&gpu->pdev->dev, &target_freq, 0);
 
        df->idle_time = ktime_get();
        df->idle_freq = idle_freq;