arm64: dts: qcom: sm8150: align PSCI domain names with DT schema

Bindings expect power domains to follow generic naming pattern:

  sm8150-hdk.dtb: psci: 'cpu-cluster0', 'cpu0', 'cpu1', 'cpu2', 'cpu3', 'cpu4', 'cpu5', 'cpu6',
    'cpu7' do not match any of the regexes: '^power-domain-', 'pinctrl-[0-9]+'

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230102085452.10753-3-krzysztof.kozlowski@linaro.org

diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
index 4d00e18..9975098 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
@@ -610,55 +610,55 @@
                compatible = "arm,psci-1.0";
                method = "smc";
 
-               CPU_PD0: cpu0 {
+               CPU_PD0: power-domain-cpu0 {
                        #power-domain-cells = <0>;
                        power-domains = <&CLUSTER_PD>;
                        domain-idle-states = <&LITTLE_CPU_SLEEP_0>;
                };
 
-               CPU_PD1: cpu1 {
+               CPU_PD1: power-domain-cpu1 {
                        #power-domain-cells = <0>;
                        power-domains = <&CLUSTER_PD>;
                        domain-idle-states = <&LITTLE_CPU_SLEEP_0>;
                };
 
-               CPU_PD2: cpu2 {
+               CPU_PD2: power-domain-cpu2 {
                        #power-domain-cells = <0>;
                        power-domains = <&CLUSTER_PD>;
                        domain-idle-states = <&LITTLE_CPU_SLEEP_0>;
                };
 
-               CPU_PD3: cpu3 {
+               CPU_PD3: power-domain-cpu3 {
                        #power-domain-cells = <0>;
                        power-domains = <&CLUSTER_PD>;
                        domain-idle-states = <&LITTLE_CPU_SLEEP_0>;
                };
 
-               CPU_PD4: cpu4 {
+               CPU_PD4: power-domain-cpu4 {
                        #power-domain-cells = <0>;
                        power-domains = <&CLUSTER_PD>;
                        domain-idle-states = <&BIG_CPU_SLEEP_0>;
                };
 
-               CPU_PD5: cpu5 {
+               CPU_PD5: power-domain-cpu5 {
                        #power-domain-cells = <0>;
                        power-domains = <&CLUSTER_PD>;
                        domain-idle-states = <&BIG_CPU_SLEEP_0>;
                };
 
-               CPU_PD6: cpu6 {
+               CPU_PD6: power-domain-cpu6 {
                        #power-domain-cells = <0>;
                        power-domains = <&CLUSTER_PD>;
                        domain-idle-states = <&BIG_CPU_SLEEP_0>;
                };
 
-               CPU_PD7: cpu7 {
+               CPU_PD7: power-domain-cpu7 {
                        #power-domain-cells = <0>;
                        power-domains = <&CLUSTER_PD>;
                        domain-idle-states = <&BIG_CPU_SLEEP_0>;
                };
 
-               CLUSTER_PD: cpu-cluster0 {
+               CLUSTER_PD: power-domain-cpu-cluster0 {
                        #power-domain-cells = <0>;
                        domain-idle-states = <&CLUSTER_SLEEP_0>;
                };