; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -mtriple=thumbv8m.main < %s -simplifycfg -S -two-entry-phi-node-folding-threshold=4 | FileCheck %s --check-prefix=ALL --check-prefix=CHECK-V8M-TWO-FOLD-4
-; RUN: opt -mtriple=armv8a < %s -simplifycfg -S -two-entry-phi-node-folding-threshold=4 | FileCheck %s --check-prefix=ALL --check-prefix=CHECK-V8A-TWO-FOLD-4
-; RUN: opt -mtriple=thumbv8m.main < %s -simplifycfg -S -two-entry-phi-node-folding-threshold=5 | FileCheck %s --check-prefix=ALL --check-prefix=CHECK-V8M-TWO-FOLD-5
-; RUN: opt -mtriple=armv8a < %s -simplifycfg -S -two-entry-phi-node-folding-threshold=5 | FileCheck %s --check-prefix=ALL --check-prefix=CHECK-V8A-TWO-FOLD-5
-; RUN: opt -mtriple=thumbv8m.main < %s -simplifycfg -S -two-entry-phi-node-folding-threshold=6 | FileCheck %s --check-prefix=ALL --check-prefix=CHECK-V8M-TWO-FOLD-6
-; RUN: opt -mtriple=armv8a < %s -simplifycfg -S -two-entry-phi-node-folding-threshold=6 | FileCheck %s --check-prefix=ALL --check-prefix=CHECK-V8A-TWO-FOLD-6
+; RUN: opt -mtriple=thumbv8m.main < %s -simplifycfg -S -two-entry-phi-node-folding-threshold=4 | FileCheck %s --check-prefixes=CHECK-TWO-FOLD-4,CHECK-V8M-TWO-FOLD-4
+; RUN: opt -mtriple=armv8a < %s -simplifycfg -S -two-entry-phi-node-folding-threshold=4 | FileCheck %s --check-prefixes=CHECK-TWO-FOLD-4,CHECK-V8A-TWO-FOLD-4
+; RUN: opt -mtriple=thumbv8m.main < %s -simplifycfg -S -two-entry-phi-node-folding-threshold=5 | FileCheck %s --check-prefixes=CHECK-TWO-FOLD-5,CHECK-V8M-TWO-FOLD-5
+; RUN: opt -mtriple=armv8a < %s -simplifycfg -S -two-entry-phi-node-folding-threshold=5 | FileCheck %s --check-prefixes=CHECK-TWO-FOLD-5,CHECK-V8A-TWO-FOLD-5
+; RUN: opt -mtriple=thumbv8m.main < %s -simplifycfg -S -two-entry-phi-node-folding-threshold=6 | FileCheck %s --check-prefixes=CHECK-TWO-FOLD-6,CHECK-V8M-TWO-FOLD-6
+; RUN: opt -mtriple=armv8a < %s -simplifycfg -S -two-entry-phi-node-folding-threshold=6 | FileCheck %s --check-prefixes=CHECK-TWO-FOLD-6,CHECK-V8A-TWO-FOLD-6
define i32 @test_i32(i1 %a, i1 %b, i32 %i, i32 %j, i32 %k) {
-; CHECK-V8M-TWO-FOLD-4-LABEL: @test_i32(
-; CHECK-V8M-TWO-FOLD-4-NEXT: entry:
-; CHECK-V8M-TWO-FOLD-4-NEXT: br i1 [[A:%.*]], label [[M:%.*]], label [[O:%.*]]
-; CHECK-V8M-TWO-FOLD-4: O:
-; CHECK-V8M-TWO-FOLD-4-NEXT: [[IAJ:%.*]] = add i32 [[I:%.*]], [[J:%.*]]
-; CHECK-V8M-TWO-FOLD-4-NEXT: [[IAJAK:%.*]] = add i32 [[IAJ]], [[K:%.*]]
-; CHECK-V8M-TWO-FOLD-4-NEXT: [[IXJ:%.*]] = xor i32 [[I]], [[J]]
-; CHECK-V8M-TWO-FOLD-4-NEXT: [[IXJXK:%.*]] = xor i32 [[IXJ]], [[K]]
-; CHECK-V8M-TWO-FOLD-4-NEXT: [[WP:%.*]] = select i1 [[B:%.*]], i32 [[IAJAK]], i32 [[IXJXK]]
-; CHECK-V8M-TWO-FOLD-4-NEXT: [[WP2:%.*]] = add i32 [[WP]], [[WP]]
-; CHECK-V8M-TWO-FOLD-4-NEXT: br label [[M]]
-; CHECK-V8M-TWO-FOLD-4: M:
-; CHECK-V8M-TWO-FOLD-4-NEXT: [[W:%.*]] = phi i32 [ [[WP2]], [[O]] ], [ 2, [[ENTRY:%.*]] ]
-; CHECK-V8M-TWO-FOLD-4-NEXT: [[R:%.*]] = add i32 [[W]], 1
-; CHECK-V8M-TWO-FOLD-4-NEXT: ret i32 [[R]]
+; CHECK-TWO-FOLD-4-LABEL: @test_i32(
+; CHECK-TWO-FOLD-4-NEXT: entry:
+; CHECK-TWO-FOLD-4-NEXT: br i1 [[A:%.*]], label [[M:%.*]], label [[O:%.*]]
+; CHECK-TWO-FOLD-4: O:
+; CHECK-TWO-FOLD-4-NEXT: [[IAJ:%.*]] = add i32 [[I:%.*]], [[J:%.*]]
+; CHECK-TWO-FOLD-4-NEXT: [[IAJAK:%.*]] = add i32 [[IAJ]], [[K:%.*]]
+; CHECK-TWO-FOLD-4-NEXT: [[IXJ:%.*]] = xor i32 [[I]], [[J]]
+; CHECK-TWO-FOLD-4-NEXT: [[IXJXK:%.*]] = xor i32 [[IXJ]], [[K]]
+; CHECK-TWO-FOLD-4-NEXT: [[WP:%.*]] = select i1 [[B:%.*]], i32 [[IAJAK]], i32 [[IXJXK]]
+; CHECK-TWO-FOLD-4-NEXT: [[WP2:%.*]] = add i32 [[WP]], [[WP]]
+; CHECK-TWO-FOLD-4-NEXT: br label [[M]]
+; CHECK-TWO-FOLD-4: M:
+; CHECK-TWO-FOLD-4-NEXT: [[W:%.*]] = phi i32 [ [[WP2]], [[O]] ], [ 2, [[ENTRY:%.*]] ]
+; CHECK-TWO-FOLD-4-NEXT: [[R:%.*]] = add i32 [[W]], 1
+; CHECK-TWO-FOLD-4-NEXT: ret i32 [[R]]
;
-; CHECK-V8A-TWO-FOLD-4-LABEL: @test_i32(
-; CHECK-V8A-TWO-FOLD-4-NEXT: entry:
-; CHECK-V8A-TWO-FOLD-4-NEXT: br i1 [[A:%.*]], label [[M:%.*]], label [[O:%.*]]
-; CHECK-V8A-TWO-FOLD-4: O:
-; CHECK-V8A-TWO-FOLD-4-NEXT: [[IAJ:%.*]] = add i32 [[I:%.*]], [[J:%.*]]
-; CHECK-V8A-TWO-FOLD-4-NEXT: [[IAJAK:%.*]] = add i32 [[IAJ]], [[K:%.*]]
-; CHECK-V8A-TWO-FOLD-4-NEXT: [[IXJ:%.*]] = xor i32 [[I]], [[J]]
-; CHECK-V8A-TWO-FOLD-4-NEXT: [[IXJXK:%.*]] = xor i32 [[IXJ]], [[K]]
-; CHECK-V8A-TWO-FOLD-4-NEXT: [[WP:%.*]] = select i1 [[B:%.*]], i32 [[IAJAK]], i32 [[IXJXK]]
-; CHECK-V8A-TWO-FOLD-4-NEXT: [[WP2:%.*]] = add i32 [[WP]], [[WP]]
-; CHECK-V8A-TWO-FOLD-4-NEXT: br label [[M]]
-; CHECK-V8A-TWO-FOLD-4: M:
-; CHECK-V8A-TWO-FOLD-4-NEXT: [[W:%.*]] = phi i32 [ [[WP2]], [[O]] ], [ 2, [[ENTRY:%.*]] ]
-; CHECK-V8A-TWO-FOLD-4-NEXT: [[R:%.*]] = add i32 [[W]], 1
-; CHECK-V8A-TWO-FOLD-4-NEXT: ret i32 [[R]]
+; CHECK-TWO-FOLD-5-LABEL: @test_i32(
+; CHECK-TWO-FOLD-5-NEXT: entry:
+; CHECK-TWO-FOLD-5-NEXT: br i1 [[A:%.*]], label [[M:%.*]], label [[O:%.*]]
+; CHECK-TWO-FOLD-5: O:
+; CHECK-TWO-FOLD-5-NEXT: [[IAJ:%.*]] = add i32 [[I:%.*]], [[J:%.*]]
+; CHECK-TWO-FOLD-5-NEXT: [[IAJAK:%.*]] = add i32 [[IAJ]], [[K:%.*]]
+; CHECK-TWO-FOLD-5-NEXT: [[IXJ:%.*]] = xor i32 [[I]], [[J]]
+; CHECK-TWO-FOLD-5-NEXT: [[IXJXK:%.*]] = xor i32 [[IXJ]], [[K]]
+; CHECK-TWO-FOLD-5-NEXT: [[WP:%.*]] = select i1 [[B:%.*]], i32 [[IAJAK]], i32 [[IXJXK]]
+; CHECK-TWO-FOLD-5-NEXT: [[WP2:%.*]] = add i32 [[WP]], [[WP]]
+; CHECK-TWO-FOLD-5-NEXT: br label [[M]]
+; CHECK-TWO-FOLD-5: M:
+; CHECK-TWO-FOLD-5-NEXT: [[W:%.*]] = phi i32 [ [[WP2]], [[O]] ], [ 2, [[ENTRY:%.*]] ]
+; CHECK-TWO-FOLD-5-NEXT: [[R:%.*]] = add i32 [[W]], 1
+; CHECK-TWO-FOLD-5-NEXT: ret i32 [[R]]
;
-; CHECK-V8M-TWO-FOLD-5-LABEL: @test_i32(
-; CHECK-V8M-TWO-FOLD-5-NEXT: entry:
-; CHECK-V8M-TWO-FOLD-5-NEXT: br i1 [[A:%.*]], label [[M:%.*]], label [[O:%.*]]
-; CHECK-V8M-TWO-FOLD-5: O:
-; CHECK-V8M-TWO-FOLD-5-NEXT: [[IAJ:%.*]] = add i32 [[I:%.*]], [[J:%.*]]
-; CHECK-V8M-TWO-FOLD-5-NEXT: [[IAJAK:%.*]] = add i32 [[IAJ]], [[K:%.*]]
-; CHECK-V8M-TWO-FOLD-5-NEXT: [[IXJ:%.*]] = xor i32 [[I]], [[J]]
-; CHECK-V8M-TWO-FOLD-5-NEXT: [[IXJXK:%.*]] = xor i32 [[IXJ]], [[K]]
-; CHECK-V8M-TWO-FOLD-5-NEXT: [[WP:%.*]] = select i1 [[B:%.*]], i32 [[IAJAK]], i32 [[IXJXK]]
-; CHECK-V8M-TWO-FOLD-5-NEXT: [[WP2:%.*]] = add i32 [[WP]], [[WP]]
-; CHECK-V8M-TWO-FOLD-5-NEXT: br label [[M]]
-; CHECK-V8M-TWO-FOLD-5: M:
-; CHECK-V8M-TWO-FOLD-5-NEXT: [[W:%.*]] = phi i32 [ [[WP2]], [[O]] ], [ 2, [[ENTRY:%.*]] ]
-; CHECK-V8M-TWO-FOLD-5-NEXT: [[R:%.*]] = add i32 [[W]], 1
-; CHECK-V8M-TWO-FOLD-5-NEXT: ret i32 [[R]]
-;
-; CHECK-V8A-TWO-FOLD-5-LABEL: @test_i32(
-; CHECK-V8A-TWO-FOLD-5-NEXT: entry:
-; CHECK-V8A-TWO-FOLD-5-NEXT: br i1 [[A:%.*]], label [[M:%.*]], label [[O:%.*]]
-; CHECK-V8A-TWO-FOLD-5: O:
-; CHECK-V8A-TWO-FOLD-5-NEXT: [[IAJ:%.*]] = add i32 [[I:%.*]], [[J:%.*]]
-; CHECK-V8A-TWO-FOLD-5-NEXT: [[IAJAK:%.*]] = add i32 [[IAJ]], [[K:%.*]]
-; CHECK-V8A-TWO-FOLD-5-NEXT: [[IXJ:%.*]] = xor i32 [[I]], [[J]]
-; CHECK-V8A-TWO-FOLD-5-NEXT: [[IXJXK:%.*]] = xor i32 [[IXJ]], [[K]]
-; CHECK-V8A-TWO-FOLD-5-NEXT: [[WP:%.*]] = select i1 [[B:%.*]], i32 [[IAJAK]], i32 [[IXJXK]]
-; CHECK-V8A-TWO-FOLD-5-NEXT: [[WP2:%.*]] = add i32 [[WP]], [[WP]]
-; CHECK-V8A-TWO-FOLD-5-NEXT: br label [[M]]
-; CHECK-V8A-TWO-FOLD-5: M:
-; CHECK-V8A-TWO-FOLD-5-NEXT: [[W:%.*]] = phi i32 [ [[WP2]], [[O]] ], [ 2, [[ENTRY:%.*]] ]
-; CHECK-V8A-TWO-FOLD-5-NEXT: [[R:%.*]] = add i32 [[W]], 1
-; CHECK-V8A-TWO-FOLD-5-NEXT: ret i32 [[R]]
-;
-; CHECK-V8M-TWO-FOLD-6-LABEL: @test_i32(
-; CHECK-V8M-TWO-FOLD-6-NEXT: entry:
-; CHECK-V8M-TWO-FOLD-6-NEXT: [[IAJ:%.*]] = add i32 [[I:%.*]], [[J:%.*]]
-; CHECK-V8M-TWO-FOLD-6-NEXT: [[IAJAK:%.*]] = add i32 [[IAJ]], [[K:%.*]]
-; CHECK-V8M-TWO-FOLD-6-NEXT: [[IXJ:%.*]] = xor i32 [[I]], [[J]]
-; CHECK-V8M-TWO-FOLD-6-NEXT: [[IXJXK:%.*]] = xor i32 [[IXJ]], [[K]]
-; CHECK-V8M-TWO-FOLD-6-NEXT: [[WP:%.*]] = select i1 [[B:%.*]], i32 [[IAJAK]], i32 [[IXJXK]]
-; CHECK-V8M-TWO-FOLD-6-NEXT: [[WP2:%.*]] = add i32 [[WP]], [[WP]]
-; CHECK-V8M-TWO-FOLD-6-NEXT: [[W:%.*]] = select i1 [[A:%.*]], i32 2, i32 [[WP2]]
-; CHECK-V8M-TWO-FOLD-6-NEXT: [[R:%.*]] = add i32 [[W]], 1
-; CHECK-V8M-TWO-FOLD-6-NEXT: ret i32 [[R]]
-;
-; CHECK-V8A-TWO-FOLD-6-LABEL: @test_i32(
-; CHECK-V8A-TWO-FOLD-6-NEXT: entry:
-; CHECK-V8A-TWO-FOLD-6-NEXT: [[IAJ:%.*]] = add i32 [[I:%.*]], [[J:%.*]]
-; CHECK-V8A-TWO-FOLD-6-NEXT: [[IAJAK:%.*]] = add i32 [[IAJ]], [[K:%.*]]
-; CHECK-V8A-TWO-FOLD-6-NEXT: [[IXJ:%.*]] = xor i32 [[I]], [[J]]
-; CHECK-V8A-TWO-FOLD-6-NEXT: [[IXJXK:%.*]] = xor i32 [[IXJ]], [[K]]
-; CHECK-V8A-TWO-FOLD-6-NEXT: [[WP:%.*]] = select i1 [[B:%.*]], i32 [[IAJAK]], i32 [[IXJXK]]
-; CHECK-V8A-TWO-FOLD-6-NEXT: [[WP2:%.*]] = add i32 [[WP]], [[WP]]
-; CHECK-V8A-TWO-FOLD-6-NEXT: [[W:%.*]] = select i1 [[A:%.*]], i32 2, i32 [[WP2]]
-; CHECK-V8A-TWO-FOLD-6-NEXT: [[R:%.*]] = add i32 [[W]], 1
-; CHECK-V8A-TWO-FOLD-6-NEXT: ret i32 [[R]]
+; CHECK-TWO-FOLD-6-LABEL: @test_i32(
+; CHECK-TWO-FOLD-6-NEXT: entry:
+; CHECK-TWO-FOLD-6-NEXT: [[IAJ:%.*]] = add i32 [[I:%.*]], [[J:%.*]]
+; CHECK-TWO-FOLD-6-NEXT: [[IAJAK:%.*]] = add i32 [[IAJ]], [[K:%.*]]
+; CHECK-TWO-FOLD-6-NEXT: [[IXJ:%.*]] = xor i32 [[I]], [[J]]
+; CHECK-TWO-FOLD-6-NEXT: [[IXJXK:%.*]] = xor i32 [[IXJ]], [[K]]
+; CHECK-TWO-FOLD-6-NEXT: [[WP:%.*]] = select i1 [[B:%.*]], i32 [[IAJAK]], i32 [[IXJXK]]
+; CHECK-TWO-FOLD-6-NEXT: [[WP2:%.*]] = add i32 [[WP]], [[WP]]
+; CHECK-TWO-FOLD-6-NEXT: [[W:%.*]] = select i1 [[A:%.*]], i32 2, i32 [[WP2]]
+; CHECK-TWO-FOLD-6-NEXT: [[R:%.*]] = add i32 [[W]], 1
+; CHECK-TWO-FOLD-6-NEXT: ret i32 [[R]]
;
entry:
br i1 %a, label %M, label %O
}
define i32 @test_i32_minsize(i1 %a, i1 %b, i32 %i, i32 %j, i32 %k) #0 {
-; CHECK-V8M-TWO-FOLD-4-LABEL: @test_i32_minsize(
-; CHECK-V8M-TWO-FOLD-4-NEXT: entry:
-; CHECK-V8M-TWO-FOLD-4-NEXT: br i1 [[A:%.*]], label [[M:%.*]], label [[O:%.*]]
-; CHECK-V8M-TWO-FOLD-4: O:
-; CHECK-V8M-TWO-FOLD-4-NEXT: [[IAJ:%.*]] = add i32 [[I:%.*]], [[J:%.*]]
-; CHECK-V8M-TWO-FOLD-4-NEXT: [[IAJAK:%.*]] = add i32 [[IAJ]], [[K:%.*]]
-; CHECK-V8M-TWO-FOLD-4-NEXT: [[IXJ:%.*]] = xor i32 [[I]], [[J]]
-; CHECK-V8M-TWO-FOLD-4-NEXT: [[IXJXK:%.*]] = xor i32 [[IXJ]], [[K]]
-; CHECK-V8M-TWO-FOLD-4-NEXT: [[WP:%.*]] = select i1 [[B:%.*]], i32 [[IAJAK]], i32 [[IXJXK]]
-; CHECK-V8M-TWO-FOLD-4-NEXT: [[WP2:%.*]] = add i32 [[WP]], [[WP]]
-; CHECK-V8M-TWO-FOLD-4-NEXT: br label [[M]]
-; CHECK-V8M-TWO-FOLD-4: M:
-; CHECK-V8M-TWO-FOLD-4-NEXT: [[W:%.*]] = phi i32 [ [[WP2]], [[O]] ], [ 2, [[ENTRY:%.*]] ]
-; CHECK-V8M-TWO-FOLD-4-NEXT: [[R:%.*]] = add i32 [[W]], 1
-; CHECK-V8M-TWO-FOLD-4-NEXT: ret i32 [[R]]
+; CHECK-TWO-FOLD-4-LABEL: @test_i32_minsize(
+; CHECK-TWO-FOLD-4-NEXT: entry:
+; CHECK-TWO-FOLD-4-NEXT: br i1 [[A:%.*]], label [[M:%.*]], label [[O:%.*]]
+; CHECK-TWO-FOLD-4: O:
+; CHECK-TWO-FOLD-4-NEXT: [[IAJ:%.*]] = add i32 [[I:%.*]], [[J:%.*]]
+; CHECK-TWO-FOLD-4-NEXT: [[IAJAK:%.*]] = add i32 [[IAJ]], [[K:%.*]]
+; CHECK-TWO-FOLD-4-NEXT: [[IXJ:%.*]] = xor i32 [[I]], [[J]]
+; CHECK-TWO-FOLD-4-NEXT: [[IXJXK:%.*]] = xor i32 [[IXJ]], [[K]]
+; CHECK-TWO-FOLD-4-NEXT: [[WP:%.*]] = select i1 [[B:%.*]], i32 [[IAJAK]], i32 [[IXJXK]]
+; CHECK-TWO-FOLD-4-NEXT: [[WP2:%.*]] = add i32 [[WP]], [[WP]]
+; CHECK-TWO-FOLD-4-NEXT: br label [[M]]
+; CHECK-TWO-FOLD-4: M:
+; CHECK-TWO-FOLD-4-NEXT: [[W:%.*]] = phi i32 [ [[WP2]], [[O]] ], [ 2, [[ENTRY:%.*]] ]
+; CHECK-TWO-FOLD-4-NEXT: [[R:%.*]] = add i32 [[W]], 1
+; CHECK-TWO-FOLD-4-NEXT: ret i32 [[R]]
;
-; CHECK-V8A-TWO-FOLD-4-LABEL: @test_i32_minsize(
-; CHECK-V8A-TWO-FOLD-4-NEXT: entry:
-; CHECK-V8A-TWO-FOLD-4-NEXT: br i1 [[A:%.*]], label [[M:%.*]], label [[O:%.*]]
-; CHECK-V8A-TWO-FOLD-4: O:
-; CHECK-V8A-TWO-FOLD-4-NEXT: [[IAJ:%.*]] = add i32 [[I:%.*]], [[J:%.*]]
-; CHECK-V8A-TWO-FOLD-4-NEXT: [[IAJAK:%.*]] = add i32 [[IAJ]], [[K:%.*]]
-; CHECK-V8A-TWO-FOLD-4-NEXT: [[IXJ:%.*]] = xor i32 [[I]], [[J]]
-; CHECK-V8A-TWO-FOLD-4-NEXT: [[IXJXK:%.*]] = xor i32 [[IXJ]], [[K]]
-; CHECK-V8A-TWO-FOLD-4-NEXT: [[WP:%.*]] = select i1 [[B:%.*]], i32 [[IAJAK]], i32 [[IXJXK]]
-; CHECK-V8A-TWO-FOLD-4-NEXT: [[WP2:%.*]] = add i32 [[WP]], [[WP]]
-; CHECK-V8A-TWO-FOLD-4-NEXT: br label [[M]]
-; CHECK-V8A-TWO-FOLD-4: M:
-; CHECK-V8A-TWO-FOLD-4-NEXT: [[W:%.*]] = phi i32 [ [[WP2]], [[O]] ], [ 2, [[ENTRY:%.*]] ]
-; CHECK-V8A-TWO-FOLD-4-NEXT: [[R:%.*]] = add i32 [[W]], 1
-; CHECK-V8A-TWO-FOLD-4-NEXT: ret i32 [[R]]
+; CHECK-TWO-FOLD-5-LABEL: @test_i32_minsize(
+; CHECK-TWO-FOLD-5-NEXT: entry:
+; CHECK-TWO-FOLD-5-NEXT: br i1 [[A:%.*]], label [[M:%.*]], label [[O:%.*]]
+; CHECK-TWO-FOLD-5: O:
+; CHECK-TWO-FOLD-5-NEXT: [[IAJ:%.*]] = add i32 [[I:%.*]], [[J:%.*]]
+; CHECK-TWO-FOLD-5-NEXT: [[IAJAK:%.*]] = add i32 [[IAJ]], [[K:%.*]]
+; CHECK-TWO-FOLD-5-NEXT: [[IXJ:%.*]] = xor i32 [[I]], [[J]]
+; CHECK-TWO-FOLD-5-NEXT: [[IXJXK:%.*]] = xor i32 [[IXJ]], [[K]]
+; CHECK-TWO-FOLD-5-NEXT: [[WP:%.*]] = select i1 [[B:%.*]], i32 [[IAJAK]], i32 [[IXJXK]]
+; CHECK-TWO-FOLD-5-NEXT: [[WP2:%.*]] = add i32 [[WP]], [[WP]]
+; CHECK-TWO-FOLD-5-NEXT: br label [[M]]
+; CHECK-TWO-FOLD-5: M:
+; CHECK-TWO-FOLD-5-NEXT: [[W:%.*]] = phi i32 [ [[WP2]], [[O]] ], [ 2, [[ENTRY:%.*]] ]
+; CHECK-TWO-FOLD-5-NEXT: [[R:%.*]] = add i32 [[W]], 1
+; CHECK-TWO-FOLD-5-NEXT: ret i32 [[R]]
;
-; CHECK-V8M-TWO-FOLD-5-LABEL: @test_i32_minsize(
-; CHECK-V8M-TWO-FOLD-5-NEXT: entry:
-; CHECK-V8M-TWO-FOLD-5-NEXT: br i1 [[A:%.*]], label [[M:%.*]], label [[O:%.*]]
-; CHECK-V8M-TWO-FOLD-5: O:
-; CHECK-V8M-TWO-FOLD-5-NEXT: [[IAJ:%.*]] = add i32 [[I:%.*]], [[J:%.*]]
-; CHECK-V8M-TWO-FOLD-5-NEXT: [[IAJAK:%.*]] = add i32 [[IAJ]], [[K:%.*]]
-; CHECK-V8M-TWO-FOLD-5-NEXT: [[IXJ:%.*]] = xor i32 [[I]], [[J]]
-; CHECK-V8M-TWO-FOLD-5-NEXT: [[IXJXK:%.*]] = xor i32 [[IXJ]], [[K]]
-; CHECK-V8M-TWO-FOLD-5-NEXT: [[WP:%.*]] = select i1 [[B:%.*]], i32 [[IAJAK]], i32 [[IXJXK]]
-; CHECK-V8M-TWO-FOLD-5-NEXT: [[WP2:%.*]] = add i32 [[WP]], [[WP]]
-; CHECK-V8M-TWO-FOLD-5-NEXT: br label [[M]]
-; CHECK-V8M-TWO-FOLD-5: M:
-; CHECK-V8M-TWO-FOLD-5-NEXT: [[W:%.*]] = phi i32 [ [[WP2]], [[O]] ], [ 2, [[ENTRY:%.*]] ]
-; CHECK-V8M-TWO-FOLD-5-NEXT: [[R:%.*]] = add i32 [[W]], 1
-; CHECK-V8M-TWO-FOLD-5-NEXT: ret i32 [[R]]
-;
-; CHECK-V8A-TWO-FOLD-5-LABEL: @test_i32_minsize(
-; CHECK-V8A-TWO-FOLD-5-NEXT: entry:
-; CHECK-V8A-TWO-FOLD-5-NEXT: br i1 [[A:%.*]], label [[M:%.*]], label [[O:%.*]]
-; CHECK-V8A-TWO-FOLD-5: O:
-; CHECK-V8A-TWO-FOLD-5-NEXT: [[IAJ:%.*]] = add i32 [[I:%.*]], [[J:%.*]]
-; CHECK-V8A-TWO-FOLD-5-NEXT: [[IAJAK:%.*]] = add i32 [[IAJ]], [[K:%.*]]
-; CHECK-V8A-TWO-FOLD-5-NEXT: [[IXJ:%.*]] = xor i32 [[I]], [[J]]
-; CHECK-V8A-TWO-FOLD-5-NEXT: [[IXJXK:%.*]] = xor i32 [[IXJ]], [[K]]
-; CHECK-V8A-TWO-FOLD-5-NEXT: [[WP:%.*]] = select i1 [[B:%.*]], i32 [[IAJAK]], i32 [[IXJXK]]
-; CHECK-V8A-TWO-FOLD-5-NEXT: [[WP2:%.*]] = add i32 [[WP]], [[WP]]
-; CHECK-V8A-TWO-FOLD-5-NEXT: br label [[M]]
-; CHECK-V8A-TWO-FOLD-5: M:
-; CHECK-V8A-TWO-FOLD-5-NEXT: [[W:%.*]] = phi i32 [ [[WP2]], [[O]] ], [ 2, [[ENTRY:%.*]] ]
-; CHECK-V8A-TWO-FOLD-5-NEXT: [[R:%.*]] = add i32 [[W]], 1
-; CHECK-V8A-TWO-FOLD-5-NEXT: ret i32 [[R]]
-;
-; CHECK-V8M-TWO-FOLD-6-LABEL: @test_i32_minsize(
-; CHECK-V8M-TWO-FOLD-6-NEXT: entry:
-; CHECK-V8M-TWO-FOLD-6-NEXT: [[IAJ:%.*]] = add i32 [[I:%.*]], [[J:%.*]]
-; CHECK-V8M-TWO-FOLD-6-NEXT: [[IAJAK:%.*]] = add i32 [[IAJ]], [[K:%.*]]
-; CHECK-V8M-TWO-FOLD-6-NEXT: [[IXJ:%.*]] = xor i32 [[I]], [[J]]
-; CHECK-V8M-TWO-FOLD-6-NEXT: [[IXJXK:%.*]] = xor i32 [[IXJ]], [[K]]
-; CHECK-V8M-TWO-FOLD-6-NEXT: [[WP:%.*]] = select i1 [[B:%.*]], i32 [[IAJAK]], i32 [[IXJXK]]
-; CHECK-V8M-TWO-FOLD-6-NEXT: [[WP2:%.*]] = add i32 [[WP]], [[WP]]
-; CHECK-V8M-TWO-FOLD-6-NEXT: [[W:%.*]] = select i1 [[A:%.*]], i32 2, i32 [[WP2]]
-; CHECK-V8M-TWO-FOLD-6-NEXT: [[R:%.*]] = add i32 [[W]], 1
-; CHECK-V8M-TWO-FOLD-6-NEXT: ret i32 [[R]]
-;
-; CHECK-V8A-TWO-FOLD-6-LABEL: @test_i32_minsize(
-; CHECK-V8A-TWO-FOLD-6-NEXT: entry:
-; CHECK-V8A-TWO-FOLD-6-NEXT: [[IAJ:%.*]] = add i32 [[I:%.*]], [[J:%.*]]
-; CHECK-V8A-TWO-FOLD-6-NEXT: [[IAJAK:%.*]] = add i32 [[IAJ]], [[K:%.*]]
-; CHECK-V8A-TWO-FOLD-6-NEXT: [[IXJ:%.*]] = xor i32 [[I]], [[J]]
-; CHECK-V8A-TWO-FOLD-6-NEXT: [[IXJXK:%.*]] = xor i32 [[IXJ]], [[K]]
-; CHECK-V8A-TWO-FOLD-6-NEXT: [[WP:%.*]] = select i1 [[B:%.*]], i32 [[IAJAK]], i32 [[IXJXK]]
-; CHECK-V8A-TWO-FOLD-6-NEXT: [[WP2:%.*]] = add i32 [[WP]], [[WP]]
-; CHECK-V8A-TWO-FOLD-6-NEXT: [[W:%.*]] = select i1 [[A:%.*]], i32 2, i32 [[WP2]]
-; CHECK-V8A-TWO-FOLD-6-NEXT: [[R:%.*]] = add i32 [[W]], 1
-; CHECK-V8A-TWO-FOLD-6-NEXT: ret i32 [[R]]
+; CHECK-TWO-FOLD-6-LABEL: @test_i32_minsize(
+; CHECK-TWO-FOLD-6-NEXT: entry:
+; CHECK-TWO-FOLD-6-NEXT: [[IAJ:%.*]] = add i32 [[I:%.*]], [[J:%.*]]
+; CHECK-TWO-FOLD-6-NEXT: [[IAJAK:%.*]] = add i32 [[IAJ]], [[K:%.*]]
+; CHECK-TWO-FOLD-6-NEXT: [[IXJ:%.*]] = xor i32 [[I]], [[J]]
+; CHECK-TWO-FOLD-6-NEXT: [[IXJXK:%.*]] = xor i32 [[IXJ]], [[K]]
+; CHECK-TWO-FOLD-6-NEXT: [[WP:%.*]] = select i1 [[B:%.*]], i32 [[IAJAK]], i32 [[IXJXK]]
+; CHECK-TWO-FOLD-6-NEXT: [[WP2:%.*]] = add i32 [[WP]], [[WP]]
+; CHECK-TWO-FOLD-6-NEXT: [[W:%.*]] = select i1 [[A:%.*]], i32 2, i32 [[WP2]]
+; CHECK-TWO-FOLD-6-NEXT: [[R:%.*]] = add i32 [[W]], 1
+; CHECK-TWO-FOLD-6-NEXT: ret i32 [[R]]
;
entry:
br i1 %a, label %M, label %O
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -S -simplifycfg < %s | FileCheck %s --check-prefix=ALL --check-prefix=EXPENSIVE
-; RUN: opt -S -simplifycfg -speculate-one-expensive-inst=false < %s | FileCheck %s --check-prefix=ALL --check-prefix=CHEAP
+; RUN: opt -S -simplifycfg < %s | FileCheck %s
+; RUN: opt -S -simplifycfg -speculate-one-expensive-inst=false < %s | FileCheck %s
declare float @llvm.sqrt.f32(float) nounwind readonly
declare float @llvm.fma.f32(float, float, float) nounwind readonly
declare float @llvm.maximum.f32(float, float) nounwind readonly
define double @fdiv_test(double %a, double %b) {
-; ALL-LABEL: @fdiv_test(
-; ALL-NEXT: entry:
-; ALL-NEXT: [[CMP:%.*]] = fcmp ogt double [[A:%.*]], 0.000000e+00
-; ALL-NEXT: [[DIV:%.*]] = fdiv double [[B:%.*]], [[A]]
-; ALL-NEXT: [[COND:%.*]] = select nsz i1 [[CMP]], double [[DIV]], double 0.000000e+00
-; ALL-NEXT: ret double [[COND]]
+; CHECK-LABEL: @fdiv_test(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ogt double [[A:%.*]], 0.000000e+00
+; CHECK-NEXT: [[DIV:%.*]] = fdiv double [[B:%.*]], [[A]]
+; CHECK-NEXT: [[COND:%.*]] = select nsz i1 [[CMP]], double [[DIV]], double 0.000000e+00
+; CHECK-NEXT: ret double [[COND]]
;
entry:
%cmp = fcmp ogt double %a, 0.0
}
define void @sqrt_test(float addrspace(1)* noalias nocapture %out, float %a) nounwind {
-; ALL-LABEL: @sqrt_test(
-; ALL-NEXT: entry:
-; ALL-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
-; ALL-NEXT: [[TMP0:%.*]] = tail call float @llvm.sqrt.f32(float [[A]]) #2
-; ALL-NEXT: [[COND_I:%.*]] = select afn i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
-; ALL-NEXT: store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
-; ALL-NEXT: ret void
+; CHECK-LABEL: @sqrt_test(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
+; CHECK-NEXT: [[TMP0:%.*]] = tail call float @llvm.sqrt.f32(float [[A]]) #2
+; CHECK-NEXT: [[COND_I:%.*]] = select afn i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
+; CHECK-NEXT: store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
+; CHECK-NEXT: ret void
;
entry:
%cmp.i = fcmp olt float %a, 0.000000e+00
}
define void @fabs_test(float addrspace(1)* noalias nocapture %out, float %a) nounwind {
-; ALL-LABEL: @fabs_test(
-; ALL-NEXT: entry:
-; ALL-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
-; ALL-NEXT: [[TMP0:%.*]] = tail call float @llvm.fabs.f32(float [[A]]) #2
-; ALL-NEXT: [[COND_I:%.*]] = select reassoc i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
-; ALL-NEXT: store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
-; ALL-NEXT: ret void
+; CHECK-LABEL: @fabs_test(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
+; CHECK-NEXT: [[TMP0:%.*]] = tail call float @llvm.fabs.f32(float [[A]]) #2
+; CHECK-NEXT: [[COND_I:%.*]] = select reassoc i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
+; CHECK-NEXT: store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
+; CHECK-NEXT: ret void
;
entry:
%cmp.i = fcmp olt float %a, 0.000000e+00
}
define void @fma_test(float addrspace(1)* noalias nocapture %out, float %a, float %b, float %c) nounwind {
-; ALL-LABEL: @fma_test(
-; ALL-NEXT: entry:
-; ALL-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
-; ALL-NEXT: [[TMP0:%.*]] = tail call float @llvm.fma.f32(float [[A]], float [[B:%.*]], float [[C:%.*]]) #2
-; ALL-NEXT: [[COND_I:%.*]] = select reassoc nsz i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
-; ALL-NEXT: store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
-; ALL-NEXT: ret void
+; CHECK-LABEL: @fma_test(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
+; CHECK-NEXT: [[TMP0:%.*]] = tail call float @llvm.fma.f32(float [[A]], float [[B:%.*]], float [[C:%.*]]) #2
+; CHECK-NEXT: [[COND_I:%.*]] = select reassoc nsz i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
+; CHECK-NEXT: store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
+; CHECK-NEXT: ret void
;
entry:
%cmp.i = fcmp olt float %a, 0.000000e+00
}
define void @fmuladd_test(float addrspace(1)* noalias nocapture %out, float %a, float %b, float %c) nounwind {
-; ALL-LABEL: @fmuladd_test(
-; ALL-NEXT: entry:
-; ALL-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
-; ALL-NEXT: [[TMP0:%.*]] = tail call float @llvm.fmuladd.f32(float [[A]], float [[B:%.*]], float [[C:%.*]]) #2
-; ALL-NEXT: [[COND_I:%.*]] = select ninf i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
-; ALL-NEXT: store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
-; ALL-NEXT: ret void
+; CHECK-LABEL: @fmuladd_test(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
+; CHECK-NEXT: [[TMP0:%.*]] = tail call float @llvm.fmuladd.f32(float [[A]], float [[B:%.*]], float [[C:%.*]]) #2
+; CHECK-NEXT: [[COND_I:%.*]] = select ninf i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
+; CHECK-NEXT: store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
+; CHECK-NEXT: ret void
;
entry:
%cmp.i = fcmp olt float %a, 0.000000e+00
}
define void @minnum_test(float addrspace(1)* noalias nocapture %out, float %a, float %b) nounwind {
-; ALL-LABEL: @minnum_test(
-; ALL-NEXT: entry:
-; ALL-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
-; ALL-NEXT: [[TMP0:%.*]] = tail call float @llvm.minnum.f32(float [[A]], float [[B:%.*]]) #2
-; ALL-NEXT: [[COND_I:%.*]] = select i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
-; ALL-NEXT: store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
-; ALL-NEXT: ret void
+; CHECK-LABEL: @minnum_test(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
+; CHECK-NEXT: [[TMP0:%.*]] = tail call float @llvm.minnum.f32(float [[A]], float [[B:%.*]]) #2
+; CHECK-NEXT: [[COND_I:%.*]] = select i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
+; CHECK-NEXT: store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
+; CHECK-NEXT: ret void
;
entry:
%cmp.i = fcmp olt float %a, 0.000000e+00
}
define void @maxnum_test(float addrspace(1)* noalias nocapture %out, float %a, float %b) nounwind {
-; ALL-LABEL: @maxnum_test(
-; ALL-NEXT: entry:
-; ALL-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
-; ALL-NEXT: [[TMP0:%.*]] = tail call float @llvm.maxnum.f32(float [[A]], float [[B:%.*]]) #2
-; ALL-NEXT: [[COND_I:%.*]] = select ninf nsz i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
-; ALL-NEXT: store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
-; ALL-NEXT: ret void
+; CHECK-LABEL: @maxnum_test(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
+; CHECK-NEXT: [[TMP0:%.*]] = tail call float @llvm.maxnum.f32(float [[A]], float [[B:%.*]]) #2
+; CHECK-NEXT: [[COND_I:%.*]] = select ninf nsz i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
+; CHECK-NEXT: store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
+; CHECK-NEXT: ret void
;
entry:
%cmp.i = fcmp olt float %a, 0.000000e+00
}
define void @minimum_test(float addrspace(1)* noalias nocapture %out, float %a, float %b) nounwind {
-; ALL-LABEL: @minimum_test(
-; ALL-NEXT: entry:
-; ALL-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
-; ALL-NEXT: [[TMP0:%.*]] = tail call float @llvm.minimum.f32(float [[A]], float [[B:%.*]]) #2
-; ALL-NEXT: [[COND_I:%.*]] = select reassoc i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
-; ALL-NEXT: store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
-; ALL-NEXT: ret void
+; CHECK-LABEL: @minimum_test(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
+; CHECK-NEXT: [[TMP0:%.*]] = tail call float @llvm.minimum.f32(float [[A]], float [[B:%.*]]) #2
+; CHECK-NEXT: [[COND_I:%.*]] = select reassoc i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
+; CHECK-NEXT: store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
+; CHECK-NEXT: ret void
;
entry:
%cmp.i = fcmp olt float %a, 0.000000e+00
}
define void @maximum_test(float addrspace(1)* noalias nocapture %out, float %a, float %b) nounwind {
-; ALL-LABEL: @maximum_test(
-; ALL-NEXT: entry:
-; ALL-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
-; ALL-NEXT: [[TMP0:%.*]] = tail call float @llvm.maximum.f32(float [[A]], float [[B:%.*]]) #2
-; ALL-NEXT: [[COND_I:%.*]] = select nsz i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
-; ALL-NEXT: store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
-; ALL-NEXT: ret void
+; CHECK-LABEL: @maximum_test(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
+; CHECK-NEXT: [[TMP0:%.*]] = tail call float @llvm.maximum.f32(float [[A]], float [[B:%.*]]) #2
+; CHECK-NEXT: [[COND_I:%.*]] = select nsz i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
+; CHECK-NEXT: store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
+; CHECK-NEXT: ret void
;
entry:
%cmp.i = fcmp olt float %a, 0.000000e+00