<struct name="Rasterizer face" size="8">
<field name="Stencil reference" size="8" start="0:0" type="hex" default="0x00"/>
- <field name="Unk 1" size="8" start="0:8" type="hex" default="0xF"/>
+ <!-- line width is 4:4 fixed point with off-by-one applied -->
+ <field name="Line width" size="8" start="0:8" type="hex" default="0xF"/>
<field name="Polygon mode" size="2" start="0:18" type="Polygon Mode" default="Fill"/>
<field name="Disable depth write" size="1" start="0:21" type="bool"/>
<field name="Depth function" size="3" start="0:24" type="ZS Func" default="Always"/>
switch (param) {
case PIPE_CAPF_MAX_LINE_WIDTH:
case PIPE_CAPF_MAX_LINE_WIDTH_AA:
- return 255.0; /* arbitrary */
+ return 16.0; /* Off-by-one fixed point 4:4 encoding */
case PIPE_CAPF_MAX_POINT_WIDTH:
case PIPE_CAPF_MAX_POINT_WIDTH_AA:
struct agx_rasterizer *so = CALLOC_STRUCT(agx_rasterizer);
so->base = *cso;
+ /* Line width is packed in a 4:4 fixed point format */
+ unsigned line_width_fixed = ((unsigned) (cso->line_width * 16.0f)) - 1;
+
+ /* Clamp to maximum line width */
+ so->line_width = MIN2(line_width_fixed, 0xFF);
+
agx_pack(so->cull, CULL, cfg) {
cfg.cull_front = cso->cull_face & PIPE_FACE_FRONT;
cfg.cull_back = cso->cull_face & PIPE_FACE_BACK;
demo_rasterizer(struct agx_context *ctx, struct agx_pool *pool)
{
struct agx_ptr t = agx_pool_alloc_aligned(pool, AGX_RASTERIZER_LENGTH, 64);
+ struct agx_rasterizer *rast = ctx->rast;
agx_pack(t.cpu, RASTERIZER, cfg) {
cfg.front.depth_function = ctx->zs.z_func;
cfg.back.depth_function = ctx->zs.z_func;
+ cfg.front.line_width = cfg.back.line_width = rast->line_width;
+
cfg.front.disable_depth_write = ctx->zs.disable_z_write;
cfg.back.disable_depth_write = ctx->zs.disable_z_write;