v4l2: modify reset api
authorchanghuang.liang <changhuang.liang@starfivetech.com>
Thu, 14 Jul 2022 07:48:02 +0000 (15:48 +0800)
committerchanghuang.liang <changhuang.liang@starfivetech.com>
Wed, 20 Jul 2022 12:29:21 +0000 (20:29 +0800)
modify reset api

Signed-off-by: changhuang.liang <changhuang.liang@starfivetech.com>
drivers/media/platform/starfive/v4l2_driver/stf_csi_hw_ops.c
drivers/media/platform/starfive/v4l2_driver/stf_csiphy_hw_ops.c
drivers/media/platform/starfive/v4l2_driver/stf_isp_hw_ops.c
drivers/media/platform/starfive/v4l2_driver/stf_vin_hw_ops.c
drivers/media/platform/starfive/v4l2_driver/stfcamss.c
drivers/media/platform/starfive/v4l2_driver/stfcamss.h

index e78b499..bbc6d93 100644 (file)
@@ -79,13 +79,6 @@ static int stf_csi_clk_enable(struct stf_csi_dev *csi_dev)
        clk_prepare_enable(stfcamss->sys_clk[STFCLK_PIXEL_CLK_IF2].clk);
        clk_prepare_enable(stfcamss->sys_clk[STFCLK_PIXEL_CLK_IF3].clk);
 
-       reset_control_deassert(stfcamss->sys_rst[STFRST_PIXEL_CLK_IF0].rstc);
-       reset_control_deassert(stfcamss->sys_rst[STFRST_PIXEL_CLK_IF1].rstc);
-       reset_control_deassert(stfcamss->sys_rst[STFRST_PIXEL_CLK_IF2].rstc);
-       reset_control_deassert(stfcamss->sys_rst[STFRST_PIXEL_CLK_IF3].rstc);
-       reset_control_deassert(stfcamss->sys_rst[STFRST_AXIRD].rstc);
-       reset_control_deassert(stfcamss->sys_rst[STFRST_AXIWR].rstc);
-
        return 0;
 }
 
@@ -93,13 +86,6 @@ static int stf_csi_clk_disable(struct stf_csi_dev *csi_dev)
 {
        struct stfcamss *stfcamss = csi_dev->stfcamss;
 
-       reset_control_assert(stfcamss->sys_rst[STFRST_AXIWR].rstc);
-       reset_control_assert(stfcamss->sys_rst[STFRST_AXIRD].rstc);
-       reset_control_assert(stfcamss->sys_rst[STFRST_PIXEL_CLK_IF3].rstc);
-       reset_control_assert(stfcamss->sys_rst[STFRST_PIXEL_CLK_IF2].rstc);
-       reset_control_assert(stfcamss->sys_rst[STFRST_PIXEL_CLK_IF1].rstc);
-       reset_control_assert(stfcamss->sys_rst[STFRST_PIXEL_CLK_IF0].rstc);
-
        clk_disable_unprepare(stfcamss->sys_clk[STFCLK_PIXEL_CLK_IF0].clk);
        clk_disable_unprepare(stfcamss->sys_clk[STFCLK_PIXEL_CLK_IF1].clk);
        clk_disable_unprepare(stfcamss->sys_clk[STFCLK_PIXEL_CLK_IF2].clk);
index b903566..15ca14b 100644 (file)
@@ -25,17 +25,11 @@ static int stf_csiphy_clk_set(struct stf_csiphy_dev *csiphy_dev, int on)
                clk_set_rate(stfcamss->sys_clk[STFCLK_M31DPHY_TXCLKESC_LAN0].clk,
                        20480000);
 
-               reset_control_deassert(stfcamss->sys_rst[STFRST_M31DPHY_HW].rstc);
-               reset_control_deassert(stfcamss->sys_rst[STFRST_M31DPHY_B09_ALWAYS_ON].rstc);
-
                count++;
        } else {
                if (count == 0)
                        goto exit;
-               if (count == 1) {
-                       reset_control_assert(stfcamss->sys_rst[STFRST_M31DPHY_HW].rstc);
-                       reset_control_assert(stfcamss->sys_rst[STFRST_M31DPHY_B09_ALWAYS_ON].rstc);
-               }
+
                count--;
        }
 exit:
index 99b0261..03c9438 100644 (file)
@@ -765,8 +765,6 @@ static int stf_isp_clk_enable(struct stf_isp_dev *isp_dev)
        struct stfcamss *stfcamss = isp_dev->stfcamss;
 
        clk_prepare_enable(stfcamss->sys_clk[STFCLK_WRAPPER_CLK_C].clk);
-       reset_control_deassert(stfcamss->sys_rst[STFRST_WRAPPER_C].rstc);
-       reset_control_deassert(stfcamss->sys_rst[STFRST_WRAPPER_P].rstc);
 
        return 0;
 }
@@ -775,8 +773,6 @@ static int stf_isp_clk_disable(struct stf_isp_dev *isp_dev)
 {
        struct stfcamss *stfcamss = isp_dev->stfcamss;
 
-       reset_control_deassert(stfcamss->sys_rst[STFRST_WRAPPER_C].rstc);
-       reset_control_deassert(stfcamss->sys_rst[STFRST_WRAPPER_P].rstc);
        clk_disable_unprepare(stfcamss->sys_clk[STFCLK_WRAPPER_CLK_C].clk);
 
        return 0;
index 62257a7..cbbc68a 100644 (file)
@@ -233,8 +233,6 @@ static int stf_vin_top_clk_init(struct stf_vin2_dev *vin_dev)
 
        clk_prepare_enable(stfcamss->sys_clk[STFCLK_ISPCORE_2X].clk);
        clk_prepare_enable(stfcamss->sys_clk[STFCLK_ISP_AXI].clk);
-       reset_control_deassert(stfcamss->sys_rst[STFRST_ISP_TOP_N].rstc);
-       reset_control_deassert(stfcamss->sys_rst[STFRST_ISP_TOP_AXI].rstc);
 
        return 0;
 }
@@ -243,8 +241,6 @@ static int stf_vin_top_clk_deinit(struct stf_vin2_dev *vin_dev)
 {
        struct stfcamss *stfcamss = vin_dev->stfcamss;
 
-       reset_control_assert(stfcamss->sys_rst[STFRST_ISP_TOP_AXI].rstc);
-       reset_control_assert(stfcamss->sys_rst[STFRST_ISP_TOP_N].rstc);
        clk_disable_unprepare(stfcamss->sys_clk[STFCLK_ISP_AXI].clk);
        clk_disable_unprepare(stfcamss->sys_clk[STFCLK_ISPCORE_2X].clk);
 
@@ -257,28 +253,32 @@ static int stf_vin_top_clk_deinit(struct stf_vin2_dev *vin_dev)
 static int stf_vin_clk_enable(struct stf_vin2_dev *vin_dev)
 {
        struct stfcamss *stfcamss = vin_dev->stfcamss;
+       int ret;
 
        clk_prepare_enable(stfcamss->sys_clk[STFCLK_PCLK].clk);
        clk_set_rate(stfcamss->sys_clk[STFCLK_APB_FUNC].clk, 51200000);
        clk_set_rate(stfcamss->sys_clk[STFCLK_SYS_CLK].clk, 307200000);
 
-       reset_control_deassert(stfcamss->sys_rst[STFRST_PCLK].rstc);
-       reset_control_deassert(stfcamss->sys_rst[STFRST_SYS_CLK].rstc);
+       ret = reset_control_deassert(stfcamss->resets);
+       if (ret)
+               dev_err(stfcamss->dev, "deassert stfcamss error.\n");
 
-       return 0;
+       return ret;
 }
 
 
 static int stf_vin_clk_disable(struct stf_vin2_dev *vin_dev)
 {
        struct stfcamss *stfcamss = vin_dev->stfcamss;
+       int ret;
 
-       reset_control_assert(stfcamss->sys_rst[STFRST_PCLK].rstc);
-       reset_control_assert(stfcamss->sys_rst[STFRST_SYS_CLK].rstc);
+       ret = reset_control_assert(stfcamss->resets);
+       if (ret)
+               dev_err(stfcamss->dev, "assert stfcamss error.\n");
 
        clk_disable_unprepare(stfcamss->sys_clk[STFCLK_PCLK].clk);
 
-       return 0;
+       return ret;
 }
 
 static int stf_vin_config_set(struct stf_vin2_dev *vin_dev)
@@ -288,14 +288,11 @@ static int stf_vin_config_set(struct stf_vin2_dev *vin_dev)
 
 static int stf_vin_wr_stream_set(struct stf_vin2_dev *vin_dev, int on)
 {
-       struct stfcamss *stfcamss = vin_dev->stfcamss;
        struct stf_vin_dev *vin = vin_dev->stfcamss->vin;
 
        //make the axiwr alway on
-       if (on) {
-               reset_control_deassert(stfcamss->sys_rst[STFRST_AXIWR].rstc);
+       if (on)
                reg_set(vin->sysctrl_base, SYSCONSAIF_SYSCFG_20, U0_VIN_CNFG_AXIWR0_EN);
-       }
 
        return 0;
 }
index edac2a1..30aeb62 100644 (file)
@@ -74,23 +74,6 @@ static struct clk_bulk_data stfcamss_clocks[] = {
        { .id = "clk_noc_bus_clk_isp_axi" },
 };
 
-static struct reset_control_bulk_data stfcamss_resets[] = {
-       { .id = "rst_wrapper_p" },
-       { .id = "rst_wrapper_c" },
-       { .id = "rst_pclk" },
-       { .id = "rst_sys_clk" },
-       { .id = "rst_axird" },
-       { .id = "rst_axiwr" },
-       { .id = "rst_pixel_clk_if0" },
-       { .id = "rst_pixel_clk_if1" },
-       { .id = "rst_pixel_clk_if2" },
-       { .id = "rst_pixel_clk_if3" },
-       { .id = "rst_m31dphy_hw" },
-       { .id = "rst_m31dphy_b09_always_on" },
-       { .id = "rst_isp_top_n" },
-       { .id = "rst_isp_top_axi" },
-};
-
 int stfcamss_get_mem_res(struct platform_device *pdev, struct stf_vin_dev *vin)
 {
        struct device *dev = &pdev->dev;
@@ -1014,24 +997,20 @@ static int stfcamss_probe(struct platform_device *pdev)
 
        ret = devm_clk_bulk_get(dev, stfcamss->nclks, stfcamss->sys_clk);
        if (ret) {
-               st_err(ST_CAMSS, "faied to get clk controls\n");
+               st_err(ST_CAMSS, "Failed to get clk controls\n");
                return ret;
        }
 
-       stfcamss->nrsts = ARRAY_SIZE(stfcamss_resets);
-       stfcamss->sys_rst = stfcamss_resets;
-
-       ret = devm_reset_control_bulk_get_exclusive(dev, stfcamss->nrsts,
-               stfcamss->sys_rst);
-       if (ret) {
-               st_err(ST_CAMSS, "faied to get reset controls\n");
-               return ret;
+       stfcamss->resets = devm_reset_control_array_get_shared(dev);
+       if (IS_ERR(stfcamss->resets)) {
+               st_err(ST_CAMSS, "Failed to get stfcamss reset controls\n");
+               return PTR_ERR(stfcamss->resets);
        }
 
        ret = of_parse_phandle_with_fixed_args(dev->of_node,
                        "starfive,aon-syscon", 1, 0, &args);
        if (ret < 0) {
-               dev_err(dev, "Failed to parse starfive,aon-syscon\n");
+               st_err(ST_CAMSS, "Failed to parse starfive,aon-syscon\n");
                return -EINVAL;
        }
 
index cd4fb31..19534ef 100644 (file)
@@ -58,24 +58,6 @@ enum stf_clk_num {
        STFCLK_NUM
 };
 
-enum stf_rst_num {
-       STFRST_WRAPPER_P = 0,
-       STFRST_WRAPPER_C,
-       STFRST_PCLK,
-       STFRST_SYS_CLK,
-       STFRST_AXIRD,
-       STFRST_AXIWR,
-       STFRST_PIXEL_CLK_IF0,
-       STFRST_PIXEL_CLK_IF1,
-       STFRST_PIXEL_CLK_IF2,
-       STFRST_PIXEL_CLK_IF3,
-       STFRST_M31DPHY_HW,
-       STFRST_M31DPHY_B09_ALWAYS_ON,
-       STFRST_ISP_TOP_N,
-       STFRST_ISP_TOP_AXI,
-       STFRST_NUM
-};
-
 struct stfcamss {
        struct stf_vin_dev *vin;  // stfcamss phy res
        struct v4l2_device v4l2_dev;
@@ -90,8 +72,7 @@ struct stfcamss {
        struct v4l2_async_notifier notifier;
        struct clk_bulk_data *sys_clk;
        int nclks;
-       struct reset_control_bulk_data *sys_rst;
-       int nrsts;
+       struct reset_control *resets;
        struct regmap *stf_aon_syscon;
        uint32_t aon_gp_reg;
 #ifdef CONFIG_DEBUG_FS