+2013-09-09 Ian Bolton <ian.bolton@arm.com>
+
+ * config/aarch64/aarch64.c (aarch64_preferred_reload_class): Return
+ NO_REGS for immediate that can't be moved directly into FP_REGS.
+
2013-09-09 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/aarch64/aarch64.c (aarch64_select_cc_mode): Return CC_SWP for
}
static reg_class_t
-aarch64_preferred_reload_class (rtx x ATTRIBUTE_UNUSED, reg_class_t regclass)
+aarch64_preferred_reload_class (rtx x, reg_class_t regclass)
{
- return ((regclass == POINTER_REGS || regclass == STACK_REG)
- ? GENERAL_REGS : regclass);
+ if (regclass == POINTER_REGS || regclass == STACK_REG)
+ return GENERAL_REGS;
+
+ /* If it's an integer immediate that MOVI can't handle, then
+ FP_REGS is not an option, so we return NO_REGS instead. */
+ if (CONST_INT_P (x) && reg_class_subset_p (regclass, FP_REGS)
+ && !aarch64_simd_imm_scalar_p (x, GET_MODE (x)))
+ return NO_REGS;
+
+ return regclass;
}
void
+2013-09-09 Ian Bolton <ian.bolton@arm.com>
+
+ * gcc.target/aarch64/movdi_1.c: New test.
+
2013-09-09 Paolo Carlini <paolo.carlini@oracle.com>
PR c++/58362
--- /dev/null
+/* { dg-do compile } */
+/* { dg-options "-O2 -fno-inline" } */
+
+#include <arm_neon.h>
+
+void
+foo1 (uint64_t *a)
+{
+ uint64x1_t val18;
+ uint32x2_t val19;
+ uint64x1_t val20;
+ val19 = vcreate_u32 (0x800000004cf3dffbUL);
+ val20 = vrsra_n_u64 (val18, vreinterpret_u64_u32 (val19), 34);
+ vst1_u64 (a, val20);
+}
+
+void
+foo2 (uint64_t *a)
+{
+ uint64x1_t val18;
+ uint32x2_t val19;
+ uint64x1_t val20;
+ val19 = vcreate_u32 (0xdffbUL);
+ val20 = vrsra_n_u64 (val18, vreinterpret_u64_u32 (val19), 34);
+ vst1_u64 (a, val20);
+}