if (le16_to_cpu(ip->hw_id) == VCN_HWID)
adev->vcn.num_vcn_inst++;
+ if (le16_to_cpu(ip->hw_id) == SDMA0_HWID ||
+ le16_to_cpu(ip->hw_id) == SDMA1_HWID ||
+ le16_to_cpu(ip->hw_id) == SDMA2_HWID ||
+ le16_to_cpu(ip->hw_id) == SDMA3_HWID)
+ adev->sdma.num_instances++;
for (k = 0; k < num_base_address; k++) {
/*
switch (adev->asic_type) {
case CHIP_VEGA10:
vega10_reg_base_init(adev);
+ adev->sdma.num_instances = 2;
adev->ip_versions[MMHUB_HWIP] = IP_VERSION(9, 0, 0);
adev->ip_versions[ATHUB_HWIP] = IP_VERSION(9, 0, 0);
adev->ip_versions[OSSSYS_HWIP] = IP_VERSION(4, 0, 0);
break;
case CHIP_VEGA12:
vega10_reg_base_init(adev);
+ adev->sdma.num_instances = 2;
adev->ip_versions[MMHUB_HWIP] = IP_VERSION(9, 3, 0);
adev->ip_versions[ATHUB_HWIP] = IP_VERSION(9, 3, 0);
adev->ip_versions[OSSSYS_HWIP] = IP_VERSION(4, 0, 1);
break;
case CHIP_RAVEN:
vega10_reg_base_init(adev);
+ adev->sdma.num_instances = 1;
+ adev->vcn.num_vcn_inst = 1;
if (adev->apu_flags & AMD_APU_IS_RAVEN2) {
adev->ip_versions[MMHUB_HWIP] = IP_VERSION(9, 2, 0);
adev->ip_versions[ATHUB_HWIP] = IP_VERSION(9, 2, 0);
break;
case CHIP_VEGA20:
vega20_reg_base_init(adev);
+ adev->sdma.num_instances = 2;
adev->ip_versions[MMHUB_HWIP] = IP_VERSION(9, 4, 0);
adev->ip_versions[ATHUB_HWIP] = IP_VERSION(9, 4, 0);
adev->ip_versions[OSSSYS_HWIP] = IP_VERSION(4, 2, 0);
break;
case CHIP_ARCTURUS:
arct_reg_base_init(adev);
+ adev->sdma.num_instances = 8;
+ adev->vcn.num_vcn_inst = 2;
adev->ip_versions[MMHUB_HWIP] = IP_VERSION(9, 4, 1);
adev->ip_versions[ATHUB_HWIP] = IP_VERSION(9, 4, 1);
adev->ip_versions[OSSSYS_HWIP] = IP_VERSION(4, 2, 1);
break;
case CHIP_ALDEBARAN:
aldebaran_reg_base_init(adev);
+ adev->sdma.num_instances = 5;
+ adev->vcn.num_vcn_inst = 2;
adev->ip_versions[MMHUB_HWIP] = IP_VERSION(9, 4, 2);
adev->ip_versions[ATHUB_HWIP] = IP_VERSION(9, 4, 2);
adev->ip_versions[OSSSYS_HWIP] = IP_VERSION(4, 4, 0);