[RISCV] Fix build after r315327

Differential Revision: https://reviews.llvm.org/D38779
Patch by Chih-Mao Chen.

llvm-svn: 315455

diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
index 692a179e927d0997aec451ffdf42cbfad1f20a2d..add63b6e77f7744dadf4ed511abe52686cd46bca 100644 (file)
--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
+++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
@@ -39,7 +39,8 @@ public:
                   const MCValue &Target, MutableArrayRef<char> Data,
                   uint64_t Value, bool IsResolved) const override;
 
-  MCObjectWriter *createObjectWriter(raw_pwrite_stream &OS) const override;
+  std::unique_ptr<MCObjectWriter>
+  createObjectWriter(raw_pwrite_stream &OS) const override;
 
   bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value,
                             const MCRelaxableFragment *DF,
@@ -182,7 +183,7 @@ void RISCVAsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
   return;
 }
 
-MCObjectWriter *
+std::unique_ptr<MCObjectWriter>
 RISCVAsmBackend::createObjectWriter(raw_pwrite_stream &OS) const {
   return createRISCVELFObjectWriter(OS, OSABI, Is64Bit);
 }

diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFObjectWriter.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFObjectWriter.cpp
index 6319db84c6f41e94022500c3eb2c468807c52d89..2756d6526fe1a16915e60b09339f59c9884d9a88 100644 (file)
--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFObjectWriter.cpp
+++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFObjectWriter.cpp
@@ -11,6 +11,7 @@
 #include "MCTargetDesc/RISCVMCTargetDesc.h"
 #include "llvm/MC/MCELFObjectWriter.h"
 #include "llvm/MC/MCFixup.h"
+#include "llvm/MC/MCObjectWriter.h"
 #include "llvm/Support/ErrorHandling.h"
 
 using namespace llvm;
@@ -61,8 +62,9 @@ unsigned RISCVELFObjectWriter::getRelocType(MCContext &Ctx,
   }
 }
 
-MCObjectWriter *llvm::createRISCVELFObjectWriter(raw_pwrite_stream &OS,
-                                                 uint8_t OSABI, bool Is64Bit) {
+std::unique_ptr<MCObjectWriter>
+llvm::createRISCVELFObjectWriter(raw_pwrite_stream &OS, uint8_t OSABI,
+                                 bool Is64Bit) {
   return createELFObjectWriter(
       llvm::make_unique<RISCVELFObjectWriter>(OSABI, Is64Bit), OS,
       /*IsLittleEndian=*/false);

diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.h b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.h
index 9891fd52b2f4ef80056d72e921edd69191cd48c5..bea2f8800fa6944aaa6f50798a6f70e2ad237e3d 100644 (file)
--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.h
+++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.h
@@ -17,6 +17,7 @@
 #include "llvm/Config/config.h"
 #include "llvm/MC/MCTargetOptions.h"
 #include "llvm/Support/DataTypes.h"
+#include <memory>
 
 namespace llvm {
 class MCAsmBackend;
@@ -43,8 +44,8 @@ MCAsmBackend *createRISCVAsmBackend(const Target &T, const MCRegisterInfo &MRI,
                                     const Triple &TT, StringRef CPU,
                                     const MCTargetOptions &Options);
 
-MCObjectWriter *createRISCVELFObjectWriter(raw_pwrite_stream &OS, uint8_t OSABI,
-                                           bool Is64Bit);
+std::unique_ptr<MCObjectWriter>
+createRISCVELFObjectWriter(raw_pwrite_stream &OS, uint8_t OSABI, bool Is64Bit);
 }
 
 // Defines symbolic names for RISC-V registers.