ARM: shmobile: rcar-gen2: Cache Mode Monitor Register Value

The MD pins are sampled at reset time, hence the read value will always be
the same, and we can avoid the overhead of ioremapping the register on
every read.

Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
(cherry picked from commit 835d737d664650d7f164a5b688271a424db4434c)
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

diff --git a/arch/arm/mach-shmobile/setup-rcar-gen2.c b/arch/arm/mach-shmobile/setup-rcar-gen2.c
index 10604480f325296347cdfc7a31ed5d40135fd7b1..542c5a47173f9e8a9794a07d39b765704b9c0d75 100644 (file)
--- a/arch/arm/mach-shmobile/setup-rcar-gen2.c
+++ b/arch/arm/mach-shmobile/setup-rcar-gen2.c
@@ -30,12 +30,16 @@
 
 u32 rcar_gen2_read_mode_pins(void)
 {
-       void __iomem *modemr = ioremap_nocache(MODEMR, 4);
-       u32 mode;
-
-       BUG_ON(!modemr);
-       mode = ioread32(modemr);
-       iounmap(modemr);
+       static u32 mode;
+       static bool mode_valid;
+
+       if (!mode_valid) {
+               void __iomem *modemr = ioremap_nocache(MODEMR, 4);
+               BUG_ON(!modemr);
+               mode = ioread32(modemr);
+               iounmap(modemr);
+               mode_valid = true;
+       }
 
        return mode;
 }