[RISCV] Remove RISCVSubtarget::getArchMinVLen()/getArchMaxVLen().

Fold them into their only callers, getRealMinVLen()/getArchMaxVLen().

It is unclear right now when these are needed so removing to discourage
misuse.

Between Zvl*b extensions, vector length command line options, and
vscale range, we have several ways to influence vector length. We
need to try to keep all code on the same page.

diff --git a/llvm/lib/Target/RISCV/RISCVSubtarget.h b/llvm/lib/Target/RISCV/RISCVSubtarget.h
index 8eaf04b..678d218 100644 (file)
--- a/llvm/lib/Target/RISCV/RISCVSubtarget.h
+++ b/llvm/lib/Target/RISCV/RISCVSubtarget.h
@@ -126,11 +126,11 @@ public:
   }
   unsigned getRealMinVLen() const {
     unsigned VLen = getMinRVVVectorSizeInBits();
-    return VLen == 0 ? getArchMinVLen() : VLen;
+    return VLen == 0 ? ZvlLen : VLen;
   }
   unsigned getRealMaxVLen() const {
     unsigned VLen = getMaxRVVVectorSizeInBits();
-    return VLen == 0 ? getArchMaxVLen() : VLen;
+    return VLen == 0 ? 65536 : VLen;
   }
   RISCVABI::ABI getTargetABI() const { return TargetABI; }
   bool isRegisterReservedByUser(Register i) const {
@@ -170,11 +170,6 @@ protected:
   unsigned getMaxRVVVectorSizeInBits() const;
   unsigned getMinRVVVectorSizeInBits() const;
 
-  // Return the known range for the bit length of RVV data registers as indicated
-  // by -march and -mattr.
-  unsigned getArchMinVLen() const { return ZvlLen; }
-  unsigned getArchMaxVLen() const { return 65536; }
-
 public:
   const CallLowering *getCallLowering() const override;
   InstructionSelector *getInstructionSelector() const override;