iommu/intel: Use msi_msg shadow structs
authorThomas Gleixner <tglx@linutronix.de>
Sat, 24 Oct 2020 21:35:13 +0000 (22:35 +0100)
committerThomas Gleixner <tglx@linutronix.de>
Wed, 28 Oct 2020 19:26:25 +0000 (20:26 +0100)
Use the bitfields in the x86 shadow struct to compose the MSI message.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lore.kernel.org/r/20201024213535.443185-14-dwmw2@infradead.org
drivers/iommu/intel/irq_remapping.c

index 5628d43..30269b7 100644 (file)
@@ -20,7 +20,6 @@
 #include <asm/cpu.h>
 #include <asm/irq_remapping.h>
 #include <asm/pci-direct.h>
-#include <asm/msidef.h>
 
 #include "../irq_remapping.h"
 
@@ -1260,6 +1259,21 @@ static struct irq_chip intel_ir_chip = {
        .irq_set_vcpu_affinity  = intel_ir_set_vcpu_affinity,
 };
 
+static void fill_msi_msg(struct msi_msg *msg, u32 index, u32 subhandle)
+{
+       memset(msg, 0, sizeof(*msg));
+
+       msg->arch_addr_lo.dmar_base_address = X86_MSI_BASE_ADDRESS_LOW;
+       msg->arch_addr_lo.dmar_subhandle_valid = true;
+       msg->arch_addr_lo.dmar_format = true;
+       msg->arch_addr_lo.dmar_index_0_14 = index & 0x7FFF;
+       msg->arch_addr_lo.dmar_index_15 = !!(index & 0x8000);
+
+       msg->address_hi = X86_MSI_BASE_ADDRESS_HIGH;
+
+       msg->arch_data.dmar_subhandle = subhandle;
+}
+
 static void intel_irq_remapping_prepare_irte(struct intel_ir_data *data,
                                             struct irq_cfg *irq_cfg,
                                             struct irq_alloc_info *info,
@@ -1267,7 +1281,6 @@ static void intel_irq_remapping_prepare_irte(struct intel_ir_data *data,
 {
        struct IR_IO_APIC_route_entry *entry;
        struct irte *irte = &data->irte_entry;
-       struct msi_msg *msg = &data->msi_entry;
 
        prepare_irte(irte, irq_cfg->vector, irq_cfg->dest_apicid);
        switch (info->type) {
@@ -1308,12 +1321,7 @@ static void intel_irq_remapping_prepare_irte(struct intel_ir_data *data,
                else
                        set_msi_sid(irte, msi_desc_to_pci_dev(info->desc));
 
-               msg->address_hi = MSI_ADDR_BASE_HI;
-               msg->data = sub_handle;
-               msg->address_lo = MSI_ADDR_BASE_LO | MSI_ADDR_IR_EXT_INT |
-                                 MSI_ADDR_IR_SHV |
-                                 MSI_ADDR_IR_INDEX1(index) |
-                                 MSI_ADDR_IR_INDEX2(index);
+               fill_msi_msg(&data->msi_entry, index, sub_handle);
                break;
 
        default: