struct device;
struct hw_pci {
- struct msi_controller *msi_ctrl;
struct pci_ops *ops;
int nr_controllers;
- unsigned int io_optional:1;
void **private_data;
int (*setup)(int nr, struct pci_sys_data *);
int (*scan)(int nr, struct pci_host_bridge *);
void (*postinit)(void);
u8 (*swizzle)(struct pci_dev *dev, u8 *pin);
int (*map_irq)(const struct pci_dev *dev, u8 slot, u8 pin);
- resource_size_t (*align_resource)(struct pci_dev *dev,
- const struct resource *res,
- resource_size_t start,
- resource_size_t size,
- resource_size_t align);
};
/*
return irq;
}
-static int pcibios_init_resource(int busnr, struct pci_sys_data *sys,
- int io_optional)
+static int pcibios_init_resource(int busnr, struct pci_sys_data *sys)
{
int ret;
struct resource_entry *window;
&iomem_resource, sys->mem_offset);
}
- /*
- * If a platform says I/O port support is optional, we don't add
- * the default I/O space. The platform is responsible for adding
- * any I/O space it needs.
- */
- if (io_optional)
- return 0;
-
resource_list_for_each_entry(window, &sys->resources)
if (resource_type(window->res) == IORESOURCE_IO)
return 0;
if (ret > 0) {
- ret = pcibios_init_resource(nr, sys, hw->io_optional);
+ ret = pcibios_init_resource(nr, sys);
if (ret) {
pci_free_host_bridge(bridge);
break;
bridge->sysdata = sys;
bridge->busnr = sys->busnr;
bridge->ops = hw->ops;
- bridge->msi = hw->msi_ctrl;
- bridge->align_resource =
- hw->align_resource;
ret = pci_scan_root_bus_bridge(bridge);
}