drm/exynos: mixer: remove all static blending setup

Previously blending setup was static and most of it was
done in mixer_win_reset().

Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
Signed-off-by: Inki Dae <inki.dae@samsung.com>

diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c b/drivers/gpu/drm/exynos/exynos_mixer.c
index c0d128b..c572e27 100644 (file)
--- a/drivers/gpu/drm/exynos/exynos_mixer.c
+++ b/drivers/gpu/drm/exynos/exynos_mixer.c
@@ -401,11 +401,6 @@ static void mixer_cfg_layer(struct mixer_context *ctx, unsigned int win,
                        mixer_reg_writemask(res, MXR_LAYER_CFG,
                                            MXR_LAYER_CFG_VP_VAL(priority),
                                            MXR_LAYER_CFG_VP_MASK);
-
-                       /* control blending of graphic layer 0 */
-                       mixer_reg_writemask(res, MXR_GRAPHIC_CFG(0), val,
-                                       MXR_GRP_CFG_BLEND_PRE_MUL |
-                                       MXR_GRP_CFG_PIXEL_BLEND_EN);
                }
                break;
        }
@@ -672,7 +667,6 @@ static void mixer_win_reset(struct mixer_context *ctx)
 {
        struct mixer_resources *res = &ctx->mixer_res;
        unsigned long flags;
-       u32 val; /* value stored to register */
 
        spin_lock_irqsave(&res->reg_slock, flags);
        mixer_vsync_set_update(ctx, false);
@@ -694,23 +688,6 @@ static void mixer_win_reset(struct mixer_context *ctx)
        mixer_reg_write(res, MXR_BG_COLOR1, 0x008080);
        mixer_reg_write(res, MXR_BG_COLOR2, 0x008080);
 
-       /* setting graphical layers */
-       val  = MXR_GRP_CFG_COLOR_KEY_DISABLE; /* no blank key */
-       val |= MXR_GRP_CFG_WIN_BLEND_EN;
-       val |= MXR_GRP_CFG_ALPHA_VAL(0xff); /* non-transparent alpha */
-
-       /* Don't blend layer 0 onto the mixer background */
-       mixer_reg_write(res, MXR_GRAPHIC_CFG(0), val);
-
-       /* Blend layer 1 into layer 0 */
-       val |= MXR_GRP_CFG_BLEND_PRE_MUL;
-       val |= MXR_GRP_CFG_PIXEL_BLEND_EN;
-       mixer_reg_write(res, MXR_GRAPHIC_CFG(1), val);
-
-       /* setting video layers */
-       val = MXR_GRP_CFG_ALPHA_VAL(0);
-       mixer_reg_write(res, MXR_VIDEO_CFG, val);
-
        if (ctx->vp_enabled) {
                /* configuration of Video Processor Registers */
                vp_win_reset(ctx);