drm/amd/powerplay: refine dmesg info under powerplay.

Use pr_debug to prevent spamming unimportant dmesg.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c
index d025653..9b63fa3 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c
@@ -557,9 +557,8 @@ uint16_t phm_find_closest_vddci(struct pp_atomctrl_voltage_table *vddci_table, u
                        return vddci_table->entries[i].value;
        }
 
-       PP_ASSERT_WITH_CODE(false,
-                       "VDDCI is larger than max VDDCI in VDDCI Voltage Table!",
-                       return vddci_table->entries[i-1].value);
+       pr_debug("vddci is larger than max value in vddci_table\n");
+       return vddci_table->entries[i-1].value;
 }
 
 int phm_find_boot_level(void *table,
@@ -597,10 +596,10 @@ int phm_get_sclk_for_voltage_evv(struct pp_hwmgr *hwmgr,
                        break;
        }
 
-       PP_ASSERT_WITH_CODE(entryId < table_info->vdd_dep_on_sclk->count,
-                       "Can't find requested voltage id in vdd_dep_on_sclk table!",
-                       return -EINVAL;
-                       );
+       if (entryId >= table_info->vdd_dep_on_sclk->count) {
+               pr_debug("Can't find requested voltage id in vdd_dep_on_sclk table\n");
+               return -EINVAL;
+       }
 
        *sclk = table_info->vdd_dep_on_sclk->entries[entryId].clk;
 

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
index 58f9b1a..9d71a25 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
@@ -4162,7 +4162,7 @@ static int vega10_notify_smc_display_config_after_ps_adjustment(
                        pr_info("Attempt to set Hard Min for DCEFCLK Failed!");
                }
        } else {
-               pr_info("Cannot find requested DCEFCLK!");
+               pr_debug("Cannot find requested DCEFCLK!");
        }
 
        if (min_clocks.memoryClock != 0) {