r600/sfn: fix typos in code
authorHarri Nieminen <moiman@posteo.net>
Tue, 11 Apr 2023 21:18:38 +0000 (00:18 +0300)
committerMarge Bot <emma+marge@anholt.net>
Thu, 13 Apr 2023 23:08:22 +0000 (23:08 +0000)
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22432>

src/gallium/drivers/r600/sfn/sfn_scheduler.cpp
src/gallium/drivers/r600/sfn/sfn_scheduler.h
src/gallium/drivers/r600/sfn/sfn_shader_vs.cpp
src/gallium/drivers/r600/sfn/sfn_shader_vs.h
src/gallium/drivers/r600/sfn/tests/sfn_optimizer_test.cpp
src/gallium/drivers/r600/sfn/tests/sfn_test_shaders.cpp
src/gallium/drivers/r600/sfn/tests/sfn_test_shaders.h

index 5adb76c..4482966 100644 (file)
@@ -135,9 +135,9 @@ public:
    AluInstr *m_last_lds_instr{nullptr};
 };
 
-class BlockSheduler {
+class BlockScheduler {
 public:
-   BlockSheduler(r600_chip_class chip_class);
+   BlockScheduler(r600_chip_class chip_class);
    void run(Shader *shader);
 
    void finalize();
@@ -206,7 +206,7 @@ private:
    Block *m_current_block;
 
    int m_lds_addr_count{0};
-   int m_alu_groups_schduled{0};
+   int m_alu_groups_scheduled{0};
    r600_chip_class m_chip_class;
 };
 
@@ -227,7 +227,7 @@ schedule(Shader *original)
    // to be able to re-start scheduling
 
    auto scheduled_shader = original;
-   BlockSheduler s(original->chip_class());
+   BlockScheduler s(original->chip_class());
    s.run(scheduled_shader);
    s.finalize();
 
@@ -241,7 +241,7 @@ schedule(Shader *original)
    return scheduled_shader;
 }
 
-BlockSheduler::BlockSheduler(r600_chip_class chip_class):
+BlockScheduler::BlockScheduler(r600_chip_class chip_class):
     current_shed(sched_alu),
     m_last_pos(nullptr),
     m_last_pixel(nullptr),
@@ -252,7 +252,7 @@ BlockSheduler::BlockSheduler(r600_chip_class chip_class):
 }
 
 void
-BlockSheduler::run(Shader *shader)
+BlockScheduler::run(Shader *shader)
 {
    Shader::ShaderBlocks scheduled_blocks;
 
@@ -270,7 +270,7 @@ BlockSheduler::run(Shader *shader)
 }
 
 void
-BlockSheduler::schedule_block(Block& in_block,
+BlockScheduler::schedule_block(Block& in_block,
                               Shader::ShaderBlocks& out_blocks,
                               ValueFactory& vf)
 {
@@ -460,7 +460,7 @@ BlockSheduler::schedule_block(Block& in_block,
 }
 
 void
-BlockSheduler::finalize()
+BlockScheduler::finalize()
 {
    if (m_last_pos)
       m_last_pos->set_is_last_export(true);
@@ -471,7 +471,7 @@ BlockSheduler::finalize()
 }
 
 bool
-BlockSheduler::schedule_alu(Shader::ShaderBlocks& out_blocks)
+BlockScheduler::schedule_alu(Shader::ShaderBlocks& out_blocks)
 {
    bool success = false;
    AluGroup *group = nullptr;
@@ -485,7 +485,7 @@ BlockSheduler::schedule_alu(Shader::ShaderBlocks& out_blocks)
    if (has_alu_ready || !alu_groups_ready.empty()) {
       if (m_current_block->type() != Block::alu) {
          start_new_block(out_blocks, Block::alu);
-         m_alu_groups_schduled = 0;
+         m_alu_groups_scheduled = 0;
       }
    }
 
@@ -533,7 +533,7 @@ BlockSheduler::schedule_alu(Shader::ShaderBlocks& out_blocks)
       }
 
       if (success) {
-         ++m_alu_groups_schduled;
+         ++m_alu_groups_scheduled;
          break;
       } else if (m_current_block->kcache_reservation_failed()) {
          // LDS read groups should not lead to impossible
@@ -570,7 +570,7 @@ BlockSheduler::schedule_alu(Shader::ShaderBlocks& out_blocks)
 }
 
 bool
-BlockSheduler::schedule_tex(Shader::ShaderBlocks& out_blocks)
+BlockScheduler::schedule_tex(Shader::ShaderBlocks& out_blocks)
 {
    if (m_current_block->type() != Block::tex || m_current_block->remaining_slots() == 0) {
       start_new_block(out_blocks, Block::tex);
@@ -598,7 +598,7 @@ BlockSheduler::schedule_tex(Shader::ShaderBlocks& out_blocks)
 }
 
 bool
-BlockSheduler::schedule_vtx(Shader::ShaderBlocks& out_blocks)
+BlockScheduler::schedule_vtx(Shader::ShaderBlocks& out_blocks)
 {
    if (m_current_block->type() != Block::vtx || m_current_block->remaining_slots() == 0) {
       start_new_block(out_blocks, Block::vtx);
@@ -609,7 +609,7 @@ BlockSheduler::schedule_vtx(Shader::ShaderBlocks& out_blocks)
 
 template <typename I>
 bool
-BlockSheduler::schedule_gds(Shader::ShaderBlocks& out_blocks, std::list<I *>& ready_list)
+BlockScheduler::schedule_gds(Shader::ShaderBlocks& out_blocks, std::list<I *>& ready_list)
 {
    bool was_full = m_current_block->remaining_slots() == 0;
    if (m_current_block->type() != Block::gds || was_full) {
@@ -621,7 +621,7 @@ BlockSheduler::schedule_gds(Shader::ShaderBlocks& out_blocks, std::list<I *>& re
 }
 
 void
-BlockSheduler::start_new_block(Shader::ShaderBlocks& out_blocks, Block::Type type)
+BlockScheduler::start_new_block(Shader::ShaderBlocks& out_blocks, Block::Type type)
 {
    if (!m_current_block->empty()) {
       sfn_log << SfnLog::schedule << "Start new block\n";
@@ -635,7 +635,7 @@ BlockSheduler::start_new_block(Shader::ShaderBlocks& out_blocks, Block::Type typ
 
 template <typename I>
 bool
-BlockSheduler::schedule_cf(Shader::ShaderBlocks& out_blocks, std::list<I *>& ready_list)
+BlockScheduler::schedule_cf(Shader::ShaderBlocks& out_blocks, std::list<I *>& ready_list)
 {
    if (ready_list.empty())
       return false;
@@ -645,7 +645,7 @@ BlockSheduler::schedule_cf(Shader::ShaderBlocks& out_blocks, std::list<I *>& rea
 }
 
 bool
-BlockSheduler::schedule_alu_to_group_vec(AluGroup *group)
+BlockScheduler::schedule_alu_to_group_vec(AluGroup *group)
 {
    assert(group);
    assert(!alu_vec_ready.empty());
@@ -681,7 +681,7 @@ BlockSheduler::schedule_alu_to_group_vec(AluGroup *group)
 }
 
 bool
-BlockSheduler::schedule_alu_to_group_trans(AluGroup *group,
+BlockScheduler::schedule_alu_to_group_trans(AluGroup *group,
                                            std::list<AluInstr *>& readylist)
 {
    assert(group);
@@ -714,7 +714,7 @@ BlockSheduler::schedule_alu_to_group_trans(AluGroup *group,
 
 template <typename I>
 bool
-BlockSheduler::schedule(std::list<I *>& ready_list)
+BlockScheduler::schedule(std::list<I *>& ready_list)
 {
    if (!ready_list.empty() && m_current_block->remaining_slots() > 0) {
       auto ii = ready_list.begin();
@@ -729,7 +729,7 @@ BlockSheduler::schedule(std::list<I *>& ready_list)
 
 template <typename I>
 bool
-BlockSheduler::schedule_block(std::list<I *>& ready_list)
+BlockScheduler::schedule_block(std::list<I *>& ready_list)
 {
    bool success = false;
    while (!ready_list.empty() && m_current_block->remaining_slots() > 0) {
@@ -745,7 +745,7 @@ BlockSheduler::schedule_block(std::list<I *>& ready_list)
 }
 
 bool
-BlockSheduler::schedule_exports(Shader::ShaderBlocks& out_blocks,
+BlockScheduler::schedule_exports(Shader::ShaderBlocks& out_blocks,
                                 std::list<ExportInstr *>& ready_list)
 {
    if (m_current_block->type() != Block::cf)
@@ -775,7 +775,7 @@ BlockSheduler::schedule_exports(Shader::ShaderBlocks& out_blocks,
 }
 
 bool
-BlockSheduler::collect_ready(CollectInstructions& available)
+BlockScheduler::collect_ready(CollectInstructions& available)
 {
    sfn_log << SfnLog::schedule << "Ready instructions\n";
    bool result = false;
@@ -795,7 +795,7 @@ BlockSheduler::collect_ready(CollectInstructions& available)
 }
 
 bool
-BlockSheduler::collect_ready_alu_vec(std::list<AluInstr *>& ready,
+BlockScheduler::collect_ready_alu_vec(std::list<AluInstr *>& ready,
                                      std::list<AluInstr *>& available)
 {
    auto i = available.begin();
@@ -911,7 +911,7 @@ template <> struct type_char<RatInstr> {
 
 template <typename T>
 bool
-BlockSheduler::collect_ready_type(std::list<T *>& ready, std::list<T *>& available)
+BlockScheduler::collect_ready_type(std::list<T *>& ready, std::list<T *>& available)
 {
    auto i = available.begin();
    auto e = available.end();
index e20950b..b7b4f53 100644 (file)
@@ -36,4 +36,4 @@ schedule(Shader *original);
 
 }
 
-#endif // SHEDULER_H
+#endif // SCHEDULER_H
index ae86f99..29709db 100644 (file)
@@ -436,8 +436,8 @@ VertexShader::do_scan_instruction(nir_instr *instr)
    switch (intr->intrinsic) {
    case nir_intrinsic_load_input: {
       int vtx_register = nir_intrinsic_base(intr) + 1;
-      if (m_last_vertex_atribute_register < vtx_register)
-         m_last_vertex_atribute_register = vtx_register;
+      if (m_last_vertex_attribute_register < vtx_register)
+         m_last_vertex_attribute_register = vtx_register;
       return true;
    }
    case nir_intrinsic_store_output: {
@@ -546,7 +546,7 @@ VertexShader::do_allocate_reserved_registers()
       m_rel_vertex_id = value_factory().allocate_pinned_register(0, 1);
    }
 
-   return m_last_vertex_atribute_register + 1;
+   return m_last_vertex_attribute_register + 1;
 }
 
 bool
index 7b01f37..5c68c15 100644 (file)
@@ -178,7 +178,7 @@ private:
    void do_get_shader_info(r600_shader *sh_info) override;
 
    VertexExportStage *m_export_stage{nullptr};
-   int m_last_vertex_atribute_register{0};
+   int m_last_vertex_attribute_register{0};
    PRegister m_vertex_id{nullptr};
    PRegister m_instance_id{nullptr};
    PRegister m_rel_vertex_id{nullptr};
index 3a42196..503efa1 100644 (file)
@@ -164,11 +164,11 @@ TEST_F(TestShaderFromNir, RA_with_dest_array)
 
 TEST_F(TestShaderFromNir, RA_with_chan_group)
 {
-   auto sh = from_string(shader_group_chan_pin_combined_sheduled);
+   auto sh = from_string(shader_group_chan_pin_combined_scheduled);
 
    auto lrm = r600::LiveRangeEvaluator().run(*sh);
    EXPECT_TRUE(r600::register_allocation(lrm));
-   ra_check(sh, shader_group_chan_pin_combined_sheduled_ra);
+   ra_check(sh, shader_group_chan_pin_combined_scheduled_ra);
 }
 
 TEST_F(TestShaderFromNir, TES_opt)
index 68bd2b9..f1f9cca 100644 (file)
@@ -2178,7 +2178,7 @@ ALU_GROUP_END
 EXPORT_DONE PIXEL 0 S1.xyzw
 )";
 
-const char *shader_group_chan_pin_combined_sheduled =
+const char *shader_group_chan_pin_combined_scheduled =
    R"(FS
 CHIPCLASS EVERGREEN
 PROP MAX_COLOR_EXPORTS:1
@@ -2204,7 +2204,7 @@ ALU_GROUP_END
 EXPORT_DONE PIXEL 0 S2.xyzw
 )";
 
-const char *shader_group_chan_pin_combined_sheduled_ra =
+const char *shader_group_chan_pin_combined_scheduled_ra =
    R"(FS
 CHIPCLASS EVERGREEN
 PROP MAX_COLOR_EXPORTS:1
index 8ec81fb..1372afc 100644 (file)
@@ -64,8 +64,8 @@ extern const char *shader_with_dest_array2_scheduled_ra;
 extern const char *shader_group_chan_pin_to_combine;
 extern const char *shader_group_chan_pin_combined;
 
-extern const char *shader_group_chan_pin_combined_sheduled;
-extern const char *shader_group_chan_pin_combined_sheduled_ra;
+extern const char *shader_group_chan_pin_combined_scheduled;
+extern const char *shader_group_chan_pin_combined_scheduled_ra;
 
 extern const char *shader_group_chan_pin_to_combine_2;
 extern const char *shader_group_chan_pin_to_combine_2_opt;