objtool: Fix '-mtune=atom' decoding support in objtool 2.0

With '-mtune=atom', which is enabled with CONFIG_MATOM=y, GCC uses some
unusual instructions for setting up the stack.

Instead of:

  mov %rsp, %rbp

it does:

  lea (%rsp), %rbp

And instead of:

  add imm, %rsp

it does:

  lea disp(%rsp), %rsp

Add support for these instructions to the objtool decoder.

Reported-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Josh Poimboeuf <jpoimboe@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Fixes: baa41469a7b9 ("objtool: Implement stack validation 2.0")
Link: http://lkml.kernel.org/r/4ea1db896e821226efe1f8e09f270771bde47e65.1501188854.git.jpoimboe@redhat.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>

diff --git a/tools/objtool/arch/x86/decode.c b/tools/objtool/arch/x86/decode.c
index e4b400b..7841e5d 100644 (file)
--- a/tools/objtool/arch/x86/decode.c
+++ b/tools/objtool/arch/x86/decode.c
@@ -271,7 +271,7 @@ int arch_decode_instruction(struct elf *elf, struct section *sec,
        case 0x8d:
                if (rex == 0x48 && modrm == 0x65) {
 
-                       /* lea -disp(%rbp), %rsp */
+                       /* lea disp(%rbp), %rsp */
                        *type = INSN_STACK;
                        op->src.type = OP_SRC_ADD;
                        op->src.reg = CFI_BP;
@@ -281,6 +281,30 @@ int arch_decode_instruction(struct elf *elf, struct section *sec,
                        break;
                }
 
+               if (rex == 0x48 && (modrm == 0xa4 || modrm == 0x64) &&
+                   sib == 0x24) {
+
+                       /* lea disp(%rsp), %rsp */
+                       *type = INSN_STACK;
+                       op->src.type = OP_SRC_ADD;
+                       op->src.reg = CFI_SP;
+                       op->src.offset = insn.displacement.value;
+                       op->dest.type = OP_DEST_REG;
+                       op->dest.reg = CFI_SP;
+                       break;
+               }
+
+               if (rex == 0x48 && modrm == 0x2c && sib == 0x24) {
+
+                       /* lea (%rsp), %rbp */
+                       *type = INSN_STACK;
+                       op->src.type = OP_SRC_REG;
+                       op->src.reg = CFI_SP;
+                       op->dest.type = OP_DEST_REG;
+                       op->dest.reg = CFI_BP;
+                       break;
+               }
+
                if (rex == 0x4c && modrm == 0x54 && sib == 0x24 &&
                    insn.displacement.value == 8) {