ARM: dts: r9a06g032-rzn1d400-db: Enable CAN1

The CN10/CN11 on RZ/N1-EB board are headers to add jumpers to select which
CAN interface to route to the real CAN connector J16.

For a normal use case either we need to wire CAN1 or CAN2, but not both.

This patch enables CAN1 and disables CAN2 by default assuming CN10/CN11
is wired for CAN1.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220902062752.56841-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/arch/arm/boot/dts/r9a06g032-rzn1d400-db.dts b/arch/arm/boot/dts/r9a06g032-rzn1d400-db.dts
index 4bf8133..c18bbd7 100644 (file)
--- a/arch/arm/boot/dts/r9a06g032-rzn1d400-db.dts
+++ b/arch/arm/boot/dts/r9a06g032-rzn1d400-db.dts
@@ -26,6 +26,22 @@
        };
 };
 
+&can0 {
+       pinctrl-0 = <&pins_can0>;
+       pinctrl-names = "default";
+
+       /* Assuming CN10/CN11 are wired for CAN1 */
+       status = "okay";
+};
+
+&can1 {
+       pinctrl-0 = <&pins_can1>;
+       pinctrl-names = "default";
+
+       /* Please only enable can0 or can1, depending on CN10/CN11 */
+       /* status = "okay"; */
+};
+
 &eth_miic {
        status = "okay";
        renesas,miic-switch-portin = <MIIC_GMAC2_PORT>;
@@ -52,6 +68,18 @@
 };
 
 &pinctrl{
+       pins_can0: pins_can0 {
+               pinmux = <RZN1_PINMUX(162, RZN1_FUNC_CAN)>,     /* CAN0_TXD */
+                        <RZN1_PINMUX(163, RZN1_FUNC_CAN)>;     /* CAN0_RXD */
+               drive-strength = <6>;
+       };
+
+       pins_can1: pins_can1 {
+               pinmux = <RZN1_PINMUX(109, RZN1_FUNC_CAN)>,     /* CAN1_TXD */
+                        <RZN1_PINMUX(110, RZN1_FUNC_CAN)>;     /* CAN1_RXD */
+               drive-strength = <6>;
+       };
+
        pins_eth3: pins_eth3 {
                pinmux = <RZN1_PINMUX(36, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
                         <RZN1_PINMUX(37, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,