drm/nouveau/dmaobj: namespace + nvidia gpu names (no binary change)

The namespace of NVKM is being changed to nvkm_ instead of nouveau_,
which will be used for the DRM part of the driver.  This is being
done in order to make it very clear as to what part of the driver a
given symbol belongs to, and as a minor step towards splitting the
DRM driver out to be able to stand on its own (for virt).

Because there's already a large amount of churn here anyway, this is
as good a time as any to also switch to NVIDIA's device and chipset
naming to ease collaboration with them.

A comparison of objdump disassemblies proves no code changes.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

diff --git a/drivers/gpu/drm/nouveau/include/nvkm/engine/dmaobj.h b/drivers/gpu/drm/nouveau/include/nvkm/engine/dmaobj.h
index 1b283a7..c4fce8a 100644 (file)
--- a/drivers/gpu/drm/nouveau/include/nvkm/engine/dmaobj.h
+++ b/drivers/gpu/drm/nouveau/include/nvkm/engine/dmaobj.h
@@ -1,31 +1,26 @@
-#ifndef __NOUVEAU_DMAOBJ_H__
-#define __NOUVEAU_DMAOBJ_H__
-
-#include <core/object.h>
+#ifndef __NVKM_DMAOBJ_H__
+#define __NVKM_DMAOBJ_H__
 #include <core/engine.h>
+struct nvkm_gpuobj;
 
-struct nouveau_gpuobj;
-
-struct nouveau_dmaobj {
-       struct nouveau_object base;
+struct nvkm_dmaobj {
+       struct nvkm_object base;
        u32 target;
        u32 access;
        u64 start;
        u64 limit;
 };
 
-struct nouveau_dmaeng {
-       struct nouveau_engine base;
+struct nvkm_dmaeng {
+       struct nvkm_engine base;
 
-       /* creates a "physical" dma object from a struct nouveau_dmaobj */
-       int (*bind)(struct nouveau_dmaobj *dmaobj,
-                   struct nouveau_object *parent,
-                   struct nouveau_gpuobj **);
+       /* creates a "physical" dma object from a struct nvkm_dmaobj */
+       int (*bind)(struct nvkm_dmaobj *dmaobj, struct nvkm_object *parent,
+                   struct nvkm_gpuobj **);
 };
 
-extern struct nouveau_oclass *nv04_dmaeng_oclass;
-extern struct nouveau_oclass *nv50_dmaeng_oclass;
-extern struct nouveau_oclass *nvc0_dmaeng_oclass;
-extern struct nouveau_oclass *nvd0_dmaeng_oclass;
-
+extern struct nvkm_oclass *nv04_dmaeng_oclass;
+extern struct nvkm_oclass *nv50_dmaeng_oclass;
+extern struct nvkm_oclass *gf100_dmaeng_oclass;
+extern struct nvkm_oclass *gf110_dmaeng_oclass;
 #endif

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c
index dfc9e54..1d851d6 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c
@@ -83,7 +83,7 @@ gm100_identify(struct nouveau_device *device)
 #if 0
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
 #endif
-               device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nvd0_dmaeng_oclass;
+               device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf110_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nv108_fifo_oclass;
                device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] =  gm107_gr_oclass;
@@ -126,7 +126,7 @@ gm100_identify(struct nouveau_device *device)
 #if 0
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
 #endif
-               device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nvd0_dmaeng_oclass;
+               device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf110_dmaeng_oclass;
 #if 0
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nv108_fifo_oclass;
                device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/nvc0.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/nvc0.c
index 9ef0673..9a4e062 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/device/nvc0.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/nvc0.c
@@ -80,7 +80,7 @@ nvc0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_BAR    ] = &gf100_bar_oclass;
                device->oclass[NVDEV_SUBDEV_PMU    ] =  gf100_pmu_oclass;
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
-               device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nvc0_dmaeng_oclass;
+               device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf100_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nvc0_fifo_oclass;
                device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] =  nvc0_gr_oclass;
@@ -113,7 +113,7 @@ nvc0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_BAR    ] = &gf100_bar_oclass;
                device->oclass[NVDEV_SUBDEV_PMU    ] =  gf100_pmu_oclass;
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
-               device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nvc0_dmaeng_oclass;
+               device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf100_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nvc0_fifo_oclass;
                device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] =  nvc4_gr_oclass;
@@ -146,7 +146,7 @@ nvc0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_BAR    ] = &gf100_bar_oclass;
                device->oclass[NVDEV_SUBDEV_PMU    ] =  gf100_pmu_oclass;
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
-               device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nvc0_dmaeng_oclass;
+               device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf100_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nvc0_fifo_oclass;
                device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] =  nvc4_gr_oclass;
@@ -178,7 +178,7 @@ nvc0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_BAR    ] = &gf100_bar_oclass;
                device->oclass[NVDEV_SUBDEV_PMU    ] =  gf100_pmu_oclass;
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
-               device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nvc0_dmaeng_oclass;
+               device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf100_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nvc0_fifo_oclass;
                device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] =  nvc4_gr_oclass;
@@ -211,7 +211,7 @@ nvc0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_BAR    ] = &gf100_bar_oclass;
                device->oclass[NVDEV_SUBDEV_PMU    ] =  gf100_pmu_oclass;
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
-               device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nvc0_dmaeng_oclass;
+               device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf100_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nvc0_fifo_oclass;
                device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] =  nvc4_gr_oclass;
@@ -243,7 +243,7 @@ nvc0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_BAR    ] = &gf100_bar_oclass;
                device->oclass[NVDEV_SUBDEV_PMU    ] =  gf100_pmu_oclass;
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
-               device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nvc0_dmaeng_oclass;
+               device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf100_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nvc0_fifo_oclass;
                device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] =  nvc1_gr_oclass;
@@ -275,7 +275,7 @@ nvc0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_BAR    ] = &gf100_bar_oclass;
                device->oclass[NVDEV_SUBDEV_PMU    ] =  gf100_pmu_oclass;
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
-               device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nvc0_dmaeng_oclass;
+               device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf100_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nvc0_fifo_oclass;
                device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] =  nvc8_gr_oclass;
@@ -308,7 +308,7 @@ nvc0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_BAR    ] = &gf100_bar_oclass;
                device->oclass[NVDEV_SUBDEV_PMU    ] =  gf110_pmu_oclass;
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
-               device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nvd0_dmaeng_oclass;
+               device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf110_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nvc0_fifo_oclass;
                device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] =  nvd9_gr_oclass;
@@ -338,7 +338,7 @@ nvc0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_INSTMEM] =  nv50_instmem_oclass;
                device->oclass[NVDEV_SUBDEV_MMU    ] = &gf100_mmu_oclass;
                device->oclass[NVDEV_SUBDEV_BAR    ] = &gf100_bar_oclass;
-               device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nvd0_dmaeng_oclass;
+               device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf110_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nvc0_fifo_oclass;
                device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] =  nvd7_gr_oclass;

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/nve0.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/nve0.c
index 1072ada..91aea03 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/device/nve0.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/nve0.c
@@ -80,7 +80,7 @@ nve0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_BAR    ] = &gf100_bar_oclass;
                device->oclass[NVDEV_SUBDEV_PMU    ] =  gk104_pmu_oclass;
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
-               device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nvd0_dmaeng_oclass;
+               device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf110_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nve0_fifo_oclass;
                device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] =  nve4_gr_oclass;
@@ -114,7 +114,7 @@ nve0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_BAR    ] = &gf100_bar_oclass;
                device->oclass[NVDEV_SUBDEV_PMU    ] =  gf110_pmu_oclass;
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
-               device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nvd0_dmaeng_oclass;
+               device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf110_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nve0_fifo_oclass;
                device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] =  nve4_gr_oclass;
@@ -148,7 +148,7 @@ nve0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_BAR    ] = &gf100_bar_oclass;
                device->oclass[NVDEV_SUBDEV_PMU    ] =  gk104_pmu_oclass;
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
-               device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nvd0_dmaeng_oclass;
+               device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf110_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nve0_fifo_oclass;
                device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] =  nve4_gr_oclass;
@@ -174,7 +174,7 @@ nve0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass;
                device->oclass[NVDEV_SUBDEV_MMU    ] = &gf100_mmu_oclass;
                device->oclass[NVDEV_SUBDEV_BAR    ] = &gk20a_bar_oclass;
-               device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nvd0_dmaeng_oclass;
+               device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf110_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  gk20a_fifo_oclass;
                device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] =  gk20a_gr_oclass;
@@ -204,7 +204,7 @@ nve0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_BAR    ] = &gf100_bar_oclass;
                device->oclass[NVDEV_SUBDEV_PMU    ] =  gf110_pmu_oclass;
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
-               device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nvd0_dmaeng_oclass;
+               device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf110_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nve0_fifo_oclass;
                device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] =  nvf0_gr_oclass;
@@ -238,7 +238,7 @@ nve0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_BAR    ] = &gf100_bar_oclass;
                device->oclass[NVDEV_SUBDEV_PMU    ] =  gf110_pmu_oclass;
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
-               device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nvd0_dmaeng_oclass;
+               device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf110_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nve0_fifo_oclass;
                device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] =  gk110b_gr_oclass;
@@ -272,7 +272,7 @@ nve0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_BAR    ] = &gf100_bar_oclass;
                device->oclass[NVDEV_SUBDEV_PMU    ] =  gk208_pmu_oclass;
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
-               device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nvd0_dmaeng_oclass;
+               device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf110_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nv108_fifo_oclass;
                device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] =  nv108_gr_oclass;
@@ -305,7 +305,7 @@ nve0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_BAR    ] = &gf100_bar_oclass;
                device->oclass[NVDEV_SUBDEV_PMU    ] =  gk208_pmu_oclass;
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
-               device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nvd0_dmaeng_oclass;
+               device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf110_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nv108_fifo_oclass;
                device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] =  nv108_gr_oclass;

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/Kbuild b/drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/Kbuild
index 4f9286a..7529632 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/Kbuild
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/Kbuild
@@ -1,5 +1,5 @@
 nvkm-y += nvkm/engine/dmaobj/base.o
 nvkm-y += nvkm/engine/dmaobj/nv04.o
 nvkm-y += nvkm/engine/dmaobj/nv50.o
-nvkm-y += nvkm/engine/dmaobj/nvc0.o
-nvkm-y += nvkm/engine/dmaobj/nvd0.o
+nvkm-y += nvkm/engine/dmaobj/gf100.o
+nvkm-y += nvkm/engine/dmaobj/gf110.o

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/base.c
index 741f4a7..a2b60d8 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/base.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/base.c
@@ -21,21 +21,19 @@
  *
  * Authors: Ben Skeggs
  */
+#include "priv.h"
 
-#include <core/object.h>
 #include <core/client.h>
 #include <core/device.h>
-#include <nvif/unpack.h>
-#include <nvif/class.h>
-
 #include <subdev/fb.h>
 #include <subdev/instmem.h>
 
-#include "priv.h"
+#include <nvif/class.h>
+#include <nvif/unpack.h>
 
 static int
-nvkm_dmaobj_bind(struct nouveau_dmaobj *dmaobj, struct nouveau_object *parent,
-                struct nouveau_gpuobj **pgpuobj)
+nvkm_dmaobj_bind(struct nvkm_dmaobj *dmaobj, struct nvkm_object *parent,
+                struct nvkm_gpuobj **pgpuobj)
 {
        const struct nvkm_dmaeng_impl *impl = (void *)
                nv_oclass(nv_object(dmaobj)->engine);
@@ -48,7 +46,7 @@ nvkm_dmaobj_bind(struct nouveau_dmaobj *dmaobj, struct nouveau_object *parent,
                }
                ret = impl->bind(dmaobj, parent, pgpuobj);
                if (ret == 0)
-                       nouveau_object_ref(NULL, &parent);
+                       nvkm_object_ref(NULL, &parent);
                return ret;
        }
 
@@ -56,24 +54,24 @@ nvkm_dmaobj_bind(struct nouveau_dmaobj *dmaobj, struct nouveau_object *parent,
 }
 
 int
-nvkm_dmaobj_create_(struct nouveau_object *parent,
-                   struct nouveau_object *engine,
-                   struct nouveau_oclass *oclass, void **pdata, u32 *psize,
+nvkm_dmaobj_create_(struct nvkm_object *parent,
+                   struct nvkm_object *engine,
+                   struct nvkm_oclass *oclass, void **pdata, u32 *psize,
                    int length, void **pobject)
 {
        union {
                struct nv_dma_v0 v0;
        } *args = *pdata;
-       struct nouveau_instmem *instmem = nouveau_instmem(parent);
-       struct nouveau_client *client = nouveau_client(parent);
-       struct nouveau_device *device = nv_device(parent);
-       struct nouveau_fb *pfb = nouveau_fb(parent);
-       struct nouveau_dmaobj *dmaobj;
+       struct nvkm_instmem *instmem = nvkm_instmem(parent);
+       struct nvkm_client *client = nvkm_client(parent);
+       struct nvkm_device *device = nv_device(parent);
+       struct nvkm_fb *pfb = nvkm_fb(parent);
+       struct nvkm_dmaobj *dmaobj;
        void *data = *pdata;
        u32 size = *psize;
        int ret;
 
-       ret = nouveau_object_create_(parent, engine, oclass, 0, length, pobject);
+       ret = nvkm_object_create_(parent, engine, oclass, 0, length, pobject);
        dmaobj = *pobject;
        if (ret)
                return ret;
@@ -146,16 +144,16 @@ nvkm_dmaobj_create_(struct nouveau_object *parent,
 }
 
 int
-_nvkm_dmaeng_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
-                 struct nouveau_oclass *oclass, void *data, u32 size,
-                 struct nouveau_object **pobject)
+_nvkm_dmaeng_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
+                 struct nvkm_oclass *oclass, void *data, u32 size,
+                 struct nvkm_object **pobject)
 {
        const struct nvkm_dmaeng_impl *impl = (void *)oclass;
-       struct nouveau_dmaeng *dmaeng;
+       struct nvkm_dmaeng *dmaeng;
        int ret;
 
-       ret = nouveau_engine_create(parent, engine, oclass, true, "DMAOBJ",
-                                   "dmaobj", &dmaeng);
+       ret = nvkm_engine_create(parent, engine, oclass, true, "DMAOBJ",
+                                "dmaobj", &dmaeng);
        *pobject = nv_object(dmaeng);
        if (ret)
                return ret;

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/nvc0.c b/drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/gf100.c
similarity index 78%
rename from drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/nvc0.c
rename to drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/gf100.c
index 88ec33b..f880e51 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/nvc0.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/gf100.c
@@ -21,29 +21,26 @@
  *
  * Authors: Ben Skeggs
  */
+#include "priv.h"
 
 #include <core/client.h>
-#include <core/device.h>
 #include <core/gpuobj.h>
-#include <nvif/unpack.h>
-#include <nvif/class.h>
-
 #include <subdev/fb.h>
 
-#include "priv.h"
+#include <nvif/class.h>
+#include <nvif/unpack.h>
 
-struct nvc0_dmaobj_priv {
-       struct nouveau_dmaobj base;
+struct gf100_dmaobj_priv {
+       struct nvkm_dmaobj base;
        u32 flags0;
        u32 flags5;
 };
 
 static int
-nvc0_dmaobj_bind(struct nouveau_dmaobj *dmaobj,
-                struct nouveau_object *parent,
-                struct nouveau_gpuobj **pgpuobj)
+gf100_dmaobj_bind(struct nvkm_dmaobj *dmaobj, struct nvkm_object *parent,
+                 struct nvkm_gpuobj **pgpuobj)
 {
-       struct nvc0_dmaobj_priv *priv = (void *)dmaobj;
+       struct gf100_dmaobj_priv *priv = (void *)dmaobj;
        int ret;
 
        if (!nv_iclass(parent, NV_ENGCTX_CLASS)) {
@@ -58,7 +55,7 @@ nvc0_dmaobj_bind(struct nouveau_dmaobj *dmaobj,
        } else
                return 0;
 
-       ret = nouveau_gpuobj_new(parent, parent, 24, 32, 0, pgpuobj);
+       ret = nvkm_gpuobj_new(parent, parent, 24, 32, 0, pgpuobj);
        if (ret == 0) {
                nv_wo32(*pgpuobj, 0x00, priv->flags0 | nv_mclass(dmaobj));
                nv_wo32(*pgpuobj, 0x04, lower_32_bits(priv->base.limit));
@@ -73,15 +70,15 @@ nvc0_dmaobj_bind(struct nouveau_dmaobj *dmaobj,
 }
 
 static int
-nvc0_dmaobj_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
-                struct nouveau_oclass *oclass, void *data, u32 size,
-                struct nouveau_object **pobject)
+gf100_dmaobj_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
+                 struct nvkm_oclass *oclass, void *data, u32 size,
+                 struct nvkm_object **pobject)
 {
-       struct nouveau_dmaeng *dmaeng = (void *)engine;
+       struct nvkm_dmaeng *dmaeng = (void *)engine;
        union {
                struct gf100_dma_v0 v0;
        } *args;
-       struct nvc0_dmaobj_priv *priv;
+       struct gf100_dmaobj_priv *priv;
        u32 kind, user, unkn;
        int ret;
 
@@ -149,31 +146,31 @@ nvc0_dmaobj_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
        return dmaeng->bind(&priv->base, nv_object(priv), (void *)pobject);
 }
 
-static struct nouveau_ofuncs
-nvc0_dmaobj_ofuncs = {
-       .ctor =  nvc0_dmaobj_ctor,
+static struct nvkm_ofuncs
+gf100_dmaobj_ofuncs = {
+       .ctor =  gf100_dmaobj_ctor,
        .dtor = _nvkm_dmaobj_dtor,
        .init = _nvkm_dmaobj_init,
        .fini = _nvkm_dmaobj_fini,
 };
 
-static struct nouveau_oclass
-nvc0_dmaeng_sclass[] = {
-       { NV_DMA_FROM_MEMORY, &nvc0_dmaobj_ofuncs },
-       { NV_DMA_TO_MEMORY, &nvc0_dmaobj_ofuncs },
-       { NV_DMA_IN_MEMORY, &nvc0_dmaobj_ofuncs },
+static struct nvkm_oclass
+gf100_dmaeng_sclass[] = {
+       { NV_DMA_FROM_MEMORY, &gf100_dmaobj_ofuncs },
+       { NV_DMA_TO_MEMORY, &gf100_dmaobj_ofuncs },
+       { NV_DMA_IN_MEMORY, &gf100_dmaobj_ofuncs },
        {}
 };
 
-struct nouveau_oclass *
-nvc0_dmaeng_oclass = &(struct nvkm_dmaeng_impl) {
+struct nvkm_oclass *
+gf100_dmaeng_oclass = &(struct nvkm_dmaeng_impl) {
        .base.handle = NV_ENGINE(DMAOBJ, 0xc0),
-       .base.ofuncs = &(struct nouveau_ofuncs) {
+       .base.ofuncs = &(struct nvkm_ofuncs) {
                .ctor = _nvkm_dmaeng_ctor,
                .dtor = _nvkm_dmaeng_dtor,
                .init = _nvkm_dmaeng_init,
                .fini = _nvkm_dmaeng_fini,
        },
-       .sclass = nvc0_dmaeng_sclass,
-       .bind = nvc0_dmaobj_bind,
+       .sclass = gf100_dmaeng_sclass,
+       .bind = gf100_dmaobj_bind,
 }.base;

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/nvd0.c b/drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/gf110.c
similarity index 78%
rename from drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/nvd0.c
rename to drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/gf110.c
index 19f5f65..bf8f0f2 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/nvd0.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/gf110.c
@@ -21,28 +21,25 @@
  *
  * Authors: Ben Skeggs
  */
+#include "priv.h"
 
 #include <core/client.h>
-#include <core/device.h>
 #include <core/gpuobj.h>
-#include <nvif/unpack.h>
-#include <nvif/class.h>
-
 #include <subdev/fb.h>
 
-#include "priv.h"
+#include <nvif/class.h>
+#include <nvif/unpack.h>
 
-struct nvd0_dmaobj_priv {
-       struct nouveau_dmaobj base;
+struct gf110_dmaobj_priv {
+       struct nvkm_dmaobj base;
        u32 flags0;
 };
 
 static int
-nvd0_dmaobj_bind(struct nouveau_dmaobj *dmaobj,
-                struct nouveau_object *parent,
-                struct nouveau_gpuobj **pgpuobj)
+gf110_dmaobj_bind(struct nvkm_dmaobj *dmaobj, struct nvkm_object *parent,
+                 struct nvkm_gpuobj **pgpuobj)
 {
-       struct nvd0_dmaobj_priv *priv = (void *)dmaobj;
+       struct gf110_dmaobj_priv *priv = (void *)dmaobj;
        int ret;
 
        if (!nv_iclass(parent, NV_ENGCTX_CLASS)) {
@@ -64,7 +61,7 @@ nvd0_dmaobj_bind(struct nouveau_dmaobj *dmaobj,
        } else
                return 0;
 
-       ret = nouveau_gpuobj_new(parent, parent, 24, 32, 0, pgpuobj);
+       ret = nvkm_gpuobj_new(parent, parent, 24, 32, 0, pgpuobj);
        if (ret == 0) {
                nv_wo32(*pgpuobj, 0x00, priv->flags0);
                nv_wo32(*pgpuobj, 0x04, priv->base.start >> 8);
@@ -78,15 +75,15 @@ nvd0_dmaobj_bind(struct nouveau_dmaobj *dmaobj,
 }
 
 static int
-nvd0_dmaobj_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
-                struct nouveau_oclass *oclass, void *data, u32 size,
-                struct nouveau_object **pobject)
+gf110_dmaobj_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
+                 struct nvkm_oclass *oclass, void *data, u32 size,
+                 struct nvkm_object **pobject)
 {
-       struct nouveau_dmaeng *dmaeng = (void *)engine;
+       struct nvkm_dmaeng *dmaeng = (void *)engine;
        union {
                struct gf110_dma_v0 v0;
        } *args;
-       struct nvd0_dmaobj_priv *priv;
+       struct gf110_dmaobj_priv *priv;
        u32 kind, page;
        int ret;
 
@@ -138,31 +135,31 @@ nvd0_dmaobj_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
        return dmaeng->bind(&priv->base, nv_object(priv), (void *)pobject);
 }
 
-static struct nouveau_ofuncs
-nvd0_dmaobj_ofuncs = {
-       .ctor =  nvd0_dmaobj_ctor,
+static struct nvkm_ofuncs
+gf110_dmaobj_ofuncs = {
+       .ctor =  gf110_dmaobj_ctor,
        .dtor = _nvkm_dmaobj_dtor,
        .init = _nvkm_dmaobj_init,
        .fini = _nvkm_dmaobj_fini,
 };
 
-static struct nouveau_oclass
-nvd0_dmaeng_sclass[] = {
-       { NV_DMA_FROM_MEMORY, &nvd0_dmaobj_ofuncs },
-       { NV_DMA_TO_MEMORY, &nvd0_dmaobj_ofuncs },
-       { NV_DMA_IN_MEMORY, &nvd0_dmaobj_ofuncs },
+static struct nvkm_oclass
+gf110_dmaeng_sclass[] = {
+       { NV_DMA_FROM_MEMORY, &gf110_dmaobj_ofuncs },
+       { NV_DMA_TO_MEMORY, &gf110_dmaobj_ofuncs },
+       { NV_DMA_IN_MEMORY, &gf110_dmaobj_ofuncs },
        {}
 };
 
-struct nouveau_oclass *
-nvd0_dmaeng_oclass = &(struct nvkm_dmaeng_impl) {
+struct nvkm_oclass *
+gf110_dmaeng_oclass = &(struct nvkm_dmaeng_impl) {
        .base.handle = NV_ENGINE(DMAOBJ, 0xd0),
-       .base.ofuncs = &(struct nouveau_ofuncs) {
+       .base.ofuncs = &(struct nvkm_ofuncs) {
                .ctor = _nvkm_dmaeng_ctor,
                .dtor = _nvkm_dmaeng_dtor,
                .init = _nvkm_dmaeng_init,
                .fini = _nvkm_dmaeng_fini,
        },
-       .sclass = nvd0_dmaeng_sclass,
-       .bind = nvd0_dmaobj_bind,
+       .sclass = gf110_dmaeng_sclass,
+       .bind = gf110_dmaobj_bind,
 }.base;

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/nv04.c b/drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/nv04.c
index 8089310..b4379c2 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/nv04.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/nv04.c
@@ -21,29 +21,27 @@
  *
  * Authors: Ben Skeggs
  */
+#include "priv.h"
 
 #include <core/gpuobj.h>
-#include <nvif/class.h>
-
 #include <subdev/fb.h>
 #include <subdev/mmu/nv04.h>
 
-#include "priv.h"
+#include <nvif/class.h>
 
 struct nv04_dmaobj_priv {
-       struct nouveau_dmaobj base;
+       struct nvkm_dmaobj base;
        bool clone;
        u32 flags0;
        u32 flags2;
 };
 
 static int
-nv04_dmaobj_bind(struct nouveau_dmaobj *dmaobj,
-                struct nouveau_object *parent,
-                struct nouveau_gpuobj **pgpuobj)
+nv04_dmaobj_bind(struct nvkm_dmaobj *dmaobj, struct nvkm_object *parent,
+                struct nvkm_gpuobj **pgpuobj)
 {
        struct nv04_dmaobj_priv *priv = (void *)dmaobj;
-       struct nouveau_gpuobj *gpuobj;
+       struct nvkm_gpuobj *gpuobj;
        u64 offset = priv->base.start & 0xfffff000;
        u64 adjust = priv->base.start & 0x00000fff;
        u32 length = priv->base.limit - priv->base.start;
@@ -63,14 +61,14 @@ nv04_dmaobj_bind(struct nouveau_dmaobj *dmaobj,
 
        if (priv->clone) {
                struct nv04_mmu_priv *mmu = nv04_mmu(dmaobj);
-               struct nouveau_gpuobj *pgt = mmu->vm->pgt[0].obj[0];
+               struct nvkm_gpuobj *pgt = mmu->vm->pgt[0].obj[0];
                if (!dmaobj->start)
-                       return nouveau_gpuobj_dup(parent, pgt, pgpuobj);
+                       return nvkm_gpuobj_dup(parent, pgt, pgpuobj);
                offset  = nv_ro32(pgt, 8 + (offset >> 10));
                offset &= 0xfffff000;
        }
 
-       ret = nouveau_gpuobj_new(parent, parent, 16, 16, 0, &gpuobj);
+       ret = nvkm_gpuobj_new(parent, parent, 16, 16, 0, &gpuobj);
        *pgpuobj = gpuobj;
        if (ret == 0) {
                nv_wo32(*pgpuobj, 0x00, priv->flags0 | (adjust << 20));
@@ -83,11 +81,11 @@ nv04_dmaobj_bind(struct nouveau_dmaobj *dmaobj,
 }
 
 static int
-nv04_dmaobj_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
-                struct nouveau_oclass *oclass, void *data, u32 size,
-                struct nouveau_object **pobject)
+nv04_dmaobj_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
+                struct nvkm_oclass *oclass, void *data, u32 size,
+                struct nvkm_object **pobject)
 {
-       struct nouveau_dmaeng *dmaeng = (void *)engine;
+       struct nvkm_dmaeng *dmaeng = (void *)engine;
        struct nv04_mmu_priv *mmu = nv04_mmu(engine);
        struct nv04_dmaobj_priv *priv;
        int ret;
@@ -135,7 +133,7 @@ nv04_dmaobj_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
        return dmaeng->bind(&priv->base, nv_object(priv), (void *)pobject);
 }
 
-static struct nouveau_ofuncs
+static struct nvkm_ofuncs
 nv04_dmaobj_ofuncs = {
        .ctor =  nv04_dmaobj_ctor,
        .dtor = _nvkm_dmaobj_dtor,
@@ -143,7 +141,7 @@ nv04_dmaobj_ofuncs = {
        .fini = _nvkm_dmaobj_fini,
 };
 
-static struct nouveau_oclass
+static struct nvkm_oclass
 nv04_dmaeng_sclass[] = {
        { NV_DMA_FROM_MEMORY, &nv04_dmaobj_ofuncs },
        { NV_DMA_TO_MEMORY, &nv04_dmaobj_ofuncs },
@@ -151,10 +149,10 @@ nv04_dmaeng_sclass[] = {
        {}
 };
 
-struct nouveau_oclass *
+struct nvkm_oclass *
 nv04_dmaeng_oclass = &(struct nvkm_dmaeng_impl) {
        .base.handle = NV_ENGINE(DMAOBJ, 0x04),
-       .base.ofuncs = &(struct nouveau_ofuncs) {
+       .base.ofuncs = &(struct nvkm_ofuncs) {
                .ctor = _nvkm_dmaeng_ctor,
                .dtor = _nvkm_dmaeng_dtor,
                .init = _nvkm_dmaeng_init,

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/nv50.c b/drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/nv50.c
index a740ddb..4d3c828 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/nv50.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/nv50.c
@@ -21,26 +21,24 @@
  *
  * Authors: Ben Skeggs
  */
+#include "priv.h"
 
 #include <core/client.h>
 #include <core/gpuobj.h>
-#include <nvif/unpack.h>
-#include <nvif/class.h>
-
 #include <subdev/fb.h>
 
-#include "priv.h"
+#include <nvif/class.h>
+#include <nvif/unpack.h>
 
 struct nv50_dmaobj_priv {
-       struct nouveau_dmaobj base;
+       struct nvkm_dmaobj base;
        u32 flags0;
        u32 flags5;
 };
 
 static int
-nv50_dmaobj_bind(struct nouveau_dmaobj *dmaobj,
-                struct nouveau_object *parent,
-                struct nouveau_gpuobj **pgpuobj)
+nv50_dmaobj_bind(struct nvkm_dmaobj *dmaobj, struct nvkm_object *parent,
+                struct nvkm_gpuobj **pgpuobj)
 {
        struct nv50_dmaobj_priv *priv = (void *)dmaobj;
        int ret;
@@ -69,7 +67,7 @@ nv50_dmaobj_bind(struct nouveau_dmaobj *dmaobj,
                }
        }
 
-       ret = nouveau_gpuobj_new(parent, parent, 24, 32, 0, pgpuobj);
+       ret = nvkm_gpuobj_new(parent, parent, 24, 32, 0, pgpuobj);
        if (ret == 0) {
                nv_wo32(*pgpuobj, 0x00, priv->flags0 | nv_mclass(dmaobj));
                nv_wo32(*pgpuobj, 0x04, lower_32_bits(priv->base.limit));
@@ -84,11 +82,11 @@ nv50_dmaobj_bind(struct nouveau_dmaobj *dmaobj,
 }
 
 static int
-nv50_dmaobj_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
-                struct nouveau_oclass *oclass, void *data, u32 size,
-                struct nouveau_object **pobject)
+nv50_dmaobj_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
+                struct nvkm_oclass *oclass, void *data, u32 size,
+                struct nvkm_object **pobject)
 {
-       struct nouveau_dmaeng *dmaeng = (void *)engine;
+       struct nvkm_dmaeng *dmaeng = (void *)engine;
        union {
                struct nv50_dma_v0 v0;
        } *args;
@@ -167,7 +165,7 @@ nv50_dmaobj_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
        return dmaeng->bind(&priv->base, nv_object(priv), (void *)pobject);
 }
 
-static struct nouveau_ofuncs
+static struct nvkm_ofuncs
 nv50_dmaobj_ofuncs = {
        .ctor =  nv50_dmaobj_ctor,
        .dtor = _nvkm_dmaobj_dtor,
@@ -175,7 +173,7 @@ nv50_dmaobj_ofuncs = {
        .fini = _nvkm_dmaobj_fini,
 };
 
-static struct nouveau_oclass
+static struct nvkm_oclass
 nv50_dmaeng_sclass[] = {
        { NV_DMA_FROM_MEMORY, &nv50_dmaobj_ofuncs },
        { NV_DMA_TO_MEMORY, &nv50_dmaobj_ofuncs },
@@ -183,10 +181,10 @@ nv50_dmaeng_sclass[] = {
        {}
 };
 
-struct nouveau_oclass *
+struct nvkm_oclass *
 nv50_dmaeng_oclass = &(struct nvkm_dmaeng_impl) {
        .base.handle = NV_ENGINE(DMAOBJ, 0x50),
-       .base.ofuncs = &(struct nouveau_ofuncs) {
+       .base.ofuncs = &(struct nvkm_ofuncs) {
                .ctor = _nvkm_dmaeng_ctor,
                .dtor = _nvkm_dmaeng_dtor,
                .init = _nvkm_dmaeng_init,

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/priv.h b/drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/priv.h
index 36f7438..44ae8a0 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/priv.h
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/priv.h
@@ -1,30 +1,28 @@
 #ifndef __NVKM_DMAOBJ_PRIV_H__
 #define __NVKM_DMAOBJ_PRIV_H__
-
 #include <engine/dmaobj.h>
 
 #define nvkm_dmaobj_create(p,e,c,pa,sa,d)                                      \
        nvkm_dmaobj_create_((p), (e), (c), (pa), (sa), sizeof(**d), (void **)d)
 
-int nvkm_dmaobj_create_(struct nouveau_object *, struct nouveau_object *,
-                       struct nouveau_oclass *, void **, u32 *,
+int nvkm_dmaobj_create_(struct nvkm_object *, struct nvkm_object *,
+                       struct nvkm_oclass *, void **, u32 *,
                        int, void **);
-#define _nvkm_dmaobj_dtor nouveau_object_destroy
-#define _nvkm_dmaobj_init nouveau_object_init
-#define _nvkm_dmaobj_fini nouveau_object_fini
+#define _nvkm_dmaobj_dtor nvkm_object_destroy
+#define _nvkm_dmaobj_init nvkm_object_init
+#define _nvkm_dmaobj_fini nvkm_object_fini
 
-int _nvkm_dmaeng_ctor(struct nouveau_object *, struct nouveau_object *,
-                     struct nouveau_oclass *, void *, u32,
-                     struct nouveau_object **);
-#define _nvkm_dmaeng_dtor _nouveau_engine_dtor
-#define _nvkm_dmaeng_init _nouveau_engine_init
-#define _nvkm_dmaeng_fini _nouveau_engine_fini
+int _nvkm_dmaeng_ctor(struct nvkm_object *, struct nvkm_object *,
+                     struct nvkm_oclass *, void *, u32,
+                     struct nvkm_object **);
+#define _nvkm_dmaeng_dtor _nvkm_engine_dtor
+#define _nvkm_dmaeng_init _nvkm_engine_init
+#define _nvkm_dmaeng_fini _nvkm_engine_fini
 
 struct nvkm_dmaeng_impl {
-       struct nouveau_oclass base;
-       struct nouveau_oclass *sclass;
-       int (*bind)(struct nouveau_dmaobj *, struct nouveau_object *,
-                   struct nouveau_gpuobj **);
+       struct nvkm_oclass base;
+       struct nvkm_oclass *sclass;
+       int (*bind)(struct nvkm_dmaobj *, struct nvkm_object *,
+                   struct nvkm_gpuobj **);
 };
-
 #endif