freedreno/a6xx: Skip setting up image dims constants.
authorEric Anholt <eric@anholt.net>
Thu, 11 Mar 2021 19:20:09 +0000 (11:20 -0800)
committerMarge Bot <eric+marge@anholt.net>
Wed, 18 Aug 2021 00:15:18 +0000 (00:15 +0000)
We just use resinfo anyway.  Notably, a6xx was only doing its setup in the
FS case and not CS.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12258>

src/freedreno/ir3/ir3_nir.c
src/gallium/drivers/freedreno/a6xx/fd6_const.c
src/gallium/drivers/freedreno/a6xx/fd6_const.h
src/gallium/drivers/freedreno/a6xx/fd6_emit.c

index 0b35ef9..34fd0ec 100644 (file)
@@ -760,7 +760,7 @@ ir3_nir_lower_variant(struct ir3_shader_variant *so, nir_shader *s)
 }
 
 static void
-ir3_nir_scan_driver_consts(nir_shader *shader, struct ir3_const_state *layout)
+ir3_nir_scan_driver_consts(struct ir3_compiler *compiler, nir_shader *shader, struct ir3_const_state *layout)
 {
    nir_foreach_function (function, shader) {
       if (!function->impl)
@@ -787,12 +787,14 @@ ir3_nir_scan_driver_consts(nir_shader *shader, struct ir3_const_state *layout)
             case nir_intrinsic_image_atomic_comp_swap:
             case nir_intrinsic_image_store:
             case nir_intrinsic_image_size:
-               idx = nir_src_as_uint(intr->src[0]);
-               if (layout->image_dims.mask & (1 << idx))
-                  break;
-               layout->image_dims.mask |= (1 << idx);
-               layout->image_dims.off[idx] = layout->image_dims.count;
-               layout->image_dims.count += 3; /* three const per */
+               if (compiler->gen < 6) {
+                  idx = nir_src_as_uint(intr->src[0]);
+                  if (layout->image_dims.mask & (1 << idx))
+                     break;
+                  layout->image_dims.mask |= (1 << idx);
+                  layout->image_dims.off[idx] = layout->image_dims.count;
+                  layout->image_dims.count += 3; /* three const per */
+               }
                break;
             case nir_intrinsic_load_base_vertex:
             case nir_intrinsic_load_first_vertex:
@@ -849,7 +851,7 @@ ir3_setup_const_state(nir_shader *nir, struct ir3_shader_variant *v,
 
    memset(&const_state->offsets, ~0, sizeof(const_state->offsets));
 
-   ir3_nir_scan_driver_consts(nir, const_state);
+   ir3_nir_scan_driver_consts(compiler, nir, const_state);
 
    if ((compiler->gen < 5) && (v->shader->stream_output.num_outputs > 0)) {
       const_state->num_driver_params =
index 41a5f32..b30b441 100644 (file)
@@ -333,15 +333,6 @@ fd6_build_vs_driver_params(struct fd6_emit *emit)
 }
 
 void
-fd6_emit_ibo_consts(struct fd6_emit *emit, const struct ir3_shader_variant *v,
-                    enum pipe_shader_type stage, struct fd_ringbuffer *ring)
-{
-   struct fd_context *ctx = emit->ctx;
-
-   ir3_emit_image_dims(ctx->screen, v, ring, &ctx->shaderimg[stage]);
-}
-
-void
 fd6_emit_cs_consts(const struct ir3_shader_variant *v,
                    struct fd_ringbuffer *ring, struct fd_context *ctx,
                    const struct pipe_grid_info *info)
index 299fd29..6310985 100644 (file)
@@ -32,10 +32,6 @@ struct fd_ringbuffer *fd6_build_user_consts(struct fd6_emit *emit) assert_dt;
 struct fd_ringbuffer *
 fd6_build_vs_driver_params(struct fd6_emit *emit) assert_dt;
 
-void fd6_emit_ibo_consts(struct fd6_emit *emit,
-                         const struct ir3_shader_variant *v,
-                         enum pipe_shader_type stage,
-                         struct fd_ringbuffer *ring) assert_dt;
 void fd6_emit_cs_consts(const struct ir3_shader_variant *v,
                         struct fd_ringbuffer *ring, struct fd_context *ctx,
                         const struct pipe_grid_info *info) assert_dt;
index 4b94a16..3c4716f 100644 (file)
@@ -1076,7 +1076,6 @@ fd6_emit_state(struct fd_ringbuffer *ring, struct fd6_emit *emit)
          break;
       case FD6_GROUP_IBO:
          state = build_ibo(emit);
-         fd6_emit_ibo_consts(emit, fs, PIPE_SHADER_FRAGMENT, ring);
          break;
       case FD6_GROUP_CONST:
          state = fd6_build_user_consts(emit);