arm64: dts: exynos5433: add power-domains property to sysmmu nodes

This patch adds power-domains property to sysmmu nodes.

Signed-off-by: Hyungwon Hwang <human.hwang@samsung.com>

diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
index 65d47cb..5edadd0 100644 (file)
--- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
@@ -1660,6 +1660,7 @@
                        interrupts = <0 288 0>;
                        clock-names = "aclk", "pclk";
                        clocks = <&cmu_gscl CLK_ACLK_SMMU_GSCL0>, <&cmu_gscl CLK_PCLK_SMMU_GSCL0>;
+                       power-domains = <&pd_gscl>;
                        #iommu-cells = <0>;
                };
 
@@ -1669,6 +1670,7 @@
                        interrupts = <0 290 0>;
                        clock-names = "aclk", "pclk";
                        clocks = <&cmu_gscl CLK_ACLK_SMMU_GSCL1>, <&cmu_gscl CLK_PCLK_SMMU_GSCL1>;
+                       power-domains = <&pd_gscl>;
                        #iommu-cells = <0>;
                };
 
@@ -1678,6 +1680,7 @@
                        interrupts = <0 292 0>;
                        clock-names = "aclk", "pclk";
                        clocks = <&cmu_gscl CLK_ACLK_SMMU_GSCL2>, <&cmu_gscl CLK_PCLK_SMMU_GSCL2>;
+                       power-domains = <&pd_gscl>;
                        #iommu-cells = <0>;
                };
 
@@ -1687,6 +1690,7 @@
                        interrupts = <0 192 0>;
                        clock-names = "pclk", "aclk";
                        clocks = <&cmu_disp CLK_PCLK_SMMU_DECON0X>, <&cmu_disp CLK_ACLK_SMMU_DECON0X>;
+                       power-domains = <&pd_disp>;
                        #iommu-cells = <0>;
                };
 
@@ -1696,6 +1700,7 @@
                        interrupts = <0 194 0>;
                        clock-names = "pclk", "aclk";
                        clocks = <&cmu_disp CLK_PCLK_SMMU_DECON1X>, <&cmu_disp CLK_ACLK_SMMU_DECON1X>;
+                       power-domains = <&pd_disp>;
                        #iommu-cells = <0>;
                };
 
@@ -1725,6 +1730,7 @@
                        interrupts = <0 352 0>;
                        clock-names = "pclk", "aclk";
                        clocks = <&cmu_mfc CLK_PCLK_SMMU_MFC_0>, <&cmu_mfc CLK_ACLK_SMMU_MFC_0>;
+                       power-domains = <&pd_mfc>;
                        #iommu-cells = <0>;
                };
 
@@ -1734,6 +1740,7 @@
                        interrupts = <0 354 0>;
                        clock-names = "pclk", "aclk";
                        clocks = <&cmu_mfc CLK_PCLK_SMMU_MFC_1>, <&cmu_mfc CLK_ACLK_SMMU_MFC_1>;
+                       power-domains = <&pd_mfc>;
                        #iommu-cells = <0>;
                };
 
@@ -1743,6 +1750,7 @@
                        interrupts = <0 408 0>;
                        clock-names = "pclk", "aclk";
                        clocks = <&cmu_mscl CLK_PCLK_SMMU_JPEG>, <&cmu_mscl CLK_ACLK_SMMU_JPEG>;
+                       power-domains = <&pd_mscl>;
                        #iommu-cells = <0>;
                };