arm64: tegra: Use correct interrupts for Tegra234 TKE

[ Upstream commit c0b80988eb78d6423249ab530bfbc6b238790a26 ]

The shared interrupts 0-9 of the TKE are mapped to interrupts 0-9, but
shared interrupts 10-15 are mapped to 256-261. Correct the mapping for
the final 6 interrupts. This prevents the TKE from requesting the RTC
interrupt (along with several GTE and watchdog interrupts).

Reported-by: Shubhi Garg <shgarg@nvidia.com>
Fixes: 28d860ed02c2 ("arm64: tegra: Enable native timers on Tegra234")
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/arch/arm64/boot/dts/nvidia/tegra234.dtsi b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
index 95524e5..ac69eac 100644 (file)
--- a/arch/arm64/boot/dts/nvidia/tegra234.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
@@ -43,12 +43,12 @@
                                     <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
+                                    <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 257 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
                        status = "okay";
                };