#define DCZID_BS_SHIFT 0
#define ZCR_ELx_LEN_SHIFT 0
-#define ZCR_ELx_LEN_SIZE 4
+#define ZCR_ELx_LEN_WIDTH 4
#define ZCR_ELx_LEN_MASK 0xf
#define SMCR_ELx_FA64_SHIFT 31
#define SMCR_ELx_FA64_MASK (1 << SMCR_ELx_FA64_SHIFT)
#define SMCR_ELx_LEN_SHIFT 0
-#define SMCR_ELx_LEN_SIZE 4
+#define SMCR_ELx_LEN_WIDTH 4
#define SMCR_ELx_LEN_MASK 0xf
#define CPACR_EL1_FPEN_EL1EN (BIT(20)) /* enable EL1 access */
static const struct arm64_ftr_bits ftr_zcr[] = {
ARM64_FTR_BITS(FTR_HIDDEN, FTR_NONSTRICT, FTR_LOWER_SAFE,
- ZCR_ELx_LEN_SHIFT, ZCR_ELx_LEN_SIZE, 0), /* LEN */
+ ZCR_ELx_LEN_SHIFT, ZCR_ELx_LEN_WIDTH, 0), /* LEN */
ARM64_FTR_END,
};
static const struct arm64_ftr_bits ftr_smcr[] = {
ARM64_FTR_BITS(FTR_HIDDEN, FTR_NONSTRICT, FTR_LOWER_SAFE,
- SMCR_ELx_LEN_SHIFT, SMCR_ELx_LEN_SIZE, 0), /* LEN */
+ SMCR_ELx_LEN_SHIFT, SMCR_ELx_LEN_WIDTH, 0), /* LEN */
ARM64_FTR_END,
};