arm64: dts: qcom: sc7180: Update lpass cpu node for audio over dp

Updaate lpass dts node with HDMI reg, interrupt and iommu
for supporting audio over dp.

Signed-off-by: V Sujith Kumar Reddy <vsujithk@codeaurora.org>
Signed-off-by: Srinivasa Rao Mandadapu <srivasam@qti.qualcomm.com>
Reviewed-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Link: https://lore.kernel.org/r/20210721080549.28822-2-srivasam@qti.qualcomm.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
index 0a7f306..b1e8f50 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
@@ -3532,17 +3532,20 @@
                        #power-domain-cells = <1>;
                };
 
-               lpass_cpu: lpass@62f00000 {
+               lpass_cpu: lpass@62d87000 {
                        compatible = "qcom,sc7180-lpass-cpu";
 
-                       reg = <0 0x62f00000 0 0x29000>;
-                       reg-names = "lpass-lpaif";
+                       reg = <0 0x62d87000 0 0x68000>, <0 0x62f00000 0 0x29000>;
+                       reg-names =  "lpass-hdmiif", "lpass-lpaif";
 
                        iommus = <&apps_smmu 0x1020 0>,
-                               <&apps_smmu 0x1021 0>;
+                               <&apps_smmu 0x1021 0>,
+                               <&apps_smmu 0x1032 0>;
 
                        power-domains = <&lpass_hm LPASS_CORE_HM_GDSCR>;
 
+                       status = "disabled";
+
                        clocks = <&gcc GCC_LPASS_CFG_NOC_SWAY_CLK>,
                                 <&lpasscc LPASS_AUDIO_CORE_CORE_CLK>,
                                 <&lpasscc LPASS_AUDIO_CORE_EXT_MCLK0_CLK>,
@@ -3559,8 +3562,9 @@
                        #address-cells = <1>;
                        #size-cells = <0>;
 
-                       interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>;
-                       interrupt-names = "lpass-irq-lpaif";
+                       interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
+                                       <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "lpass-irq-lpaif", "lpass-irq-hdmi";
                };
 
                lpass_hm: clock-controller@63000000 {