drm/sun4i: rgb: Fix potential division by zero
authorMaxime Ripard <maxime.ripard@bootlin.com>
Wed, 21 Feb 2018 12:57:02 +0000 (13:57 +0100)
committerMaxime Ripard <maxime.ripard@bootlin.com>
Tue, 6 Mar 2018 15:27:31 +0000 (16:27 +0100)
In the case where mode_valid callback of our RGB connector was called
before mode_set was being called, the range of dividers would not be set,
resulting in a division by zero later on in the clk_round_rate logic.

Set the range of dividers before calling clk_round_rate to fix this.

Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Tested-by: Giulio Benetti <giulio.benetti@micronovasrl.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180221125703.4595-2-maxime.ripard@bootlin.com
drivers/gpu/drm/sun4i/sun4i_rgb.c

index 832f8f9..b8da5a5 100644 (file)
@@ -92,6 +92,8 @@ static int sun4i_rgb_mode_valid(struct drm_connector *connector,
 
        DRM_DEBUG_DRIVER("Vertical parameters OK\n");
 
+       tcon->dclk_min_div = 6;
+       tcon->dclk_max_div = 127;
        rounded_rate = clk_round_rate(tcon->dclk, rate);
        if (rounded_rate < rate)
                return MODE_CLOCK_LOW;