#endif
#ifdef DEBUG
-# define DPRINTK(fmt, args...) printk(KERN_DEBUG "%s: " fmt, __FUNCTION__ , ## args)
+# define DPRINTK(fmt, args...) printk(KERN_DEBUG "%s: " fmt, __func__ , ## args)
#else
# define DPRINTK(fmt, args...)
#endif
#undef DEBUG
#ifdef DEBUG
-#define DBG(fmt, args...) printk(KERN_DEBUG "aty128fb: %s " fmt, __FUNCTION__, ##args);
+#define DBG(fmt, args...) printk(KERN_DEBUG "aty128fb: %s " fmt, __func__, ##args);
#else
#define DBG(fmt, args...)
#endif
pll->dsp_config = (dsp_precision << 20) | (pll->dsp_loop_latency << 16) | dsp_xclks;
#ifdef DEBUG
printk("atyfb(%s): dsp_config 0x%08x, dsp_on_off 0x%08x\n",
- __FUNCTION__, pll->dsp_config, pll->dsp_on_off);
+ __func__, pll->dsp_config, pll->dsp_on_off);
#endif
return 0;
}
(par->ref_clk_per * pll->pll_ref_div);
#ifdef DEBUG
printk("atyfb(%s): pllvclk=%d MHz, vclk=%d MHz\n",
- __FUNCTION__, pllvclk, pllvclk / pll->vclk_post_div_real);
+ __func__, pllvclk, pllvclk / pll->vclk_post_div_real);
#endif
pll->pll_vclk_cntl = 0x03; /* VCLK = PLL_VCLK/VCLKx_POST */
}
#endif
#ifdef DEBUG
- printk("atyfb(%s): calculated 0x%08X(%i)\n", __FUNCTION__, ret, ret);
+ printk("atyfb(%s): calculated 0x%08X(%i)\n", __func__, ret, ret);
#endif
return ret;
}
#ifdef DEBUG
printk("atyfb(%s): about to program:\n"
"pll_ext_cntl=0x%02x pll_gen_cntl=0x%02x pll_vclk_cntl=0x%02x\n",
- __FUNCTION__,
+ __func__,
pll->ct.pll_ext_cntl, pll->ct.pll_gen_cntl, pll->ct.pll_vclk_cntl);
printk("atyfb(%s): setting clock %lu for FeedBackDivider %i, ReferenceDivider %i, PostDivider %i(%i)\n",
- __FUNCTION__,
+ __func__,
par->clk_wr_offset, pll->ct.vclk_fb_div,
pll->ct.pll_ref_div, pll->ct.vclk_post_div, pll->ct.vclk_post_div_real);
#endif
#ifdef DEBUG
printk("atyfb(%s): mclk_fb_mult=%d, xclk_post_div=%d\n",
- __FUNCTION__, pll->ct.mclk_fb_mult, pll->ct.xclk_post_div);
+ __func__, pll->ct.mclk_fb_mult, pll->ct.xclk_post_div);
#endif
memcntl = aty_ld_le32(MEM_CNTL, par);
pllmclk = (1000000 * pll->ct.mclk_fb_mult * pll->ct.mclk_fb_div) /
(par->ref_clk_per * pll->ct.pll_ref_div);
printk("atyfb(%s): pllmclk=%d MHz, xclk=%d MHz\n",
- __FUNCTION__, pllmclk, pllmclk / pll->ct.xclk_post_div_real);
+ __func__, pllmclk, pllmclk / pll->ct.xclk_post_div_real);
#endif
if (M64_HAS(SDRAM_MAGIC_PLL) && (par->ram_type >= SDRAM))
pllsclk = (1000000 * 2 * pll->ct.sclk_fb_div) /
(par->ref_clk_per * pll->ct.pll_ref_div);
printk("atyfb(%s): use sclk, pllsclk=%d MHz, sclk=mclk=%d MHz\n",
- __FUNCTION__, pllsclk, pllsclk / sclk_post_div_real);
+ __func__, pllsclk, pllsclk / sclk_post_div_real);
#endif
}
{
if (var->bits_per_pixel != LCD_BPP) {
- pr_debug("%s: depth not supported: %u BPP\n", __FUNCTION__,
+ pr_debug("%s: depth not supported: %u BPP\n", __func__,
var->bits_per_pixel);
return -EINVAL;
}
info->var.xres_virtual != var->xres_virtual ||
info->var.yres_virtual != var->yres_virtual) {
pr_debug("%s: Resolution not supported: X%u x Y%u \n",
- __FUNCTION__, var->xres, var->yres);
+ __func__, var->xres, var->yres);
return -EINVAL;
}
if ((info->fix.line_length * var->yres_virtual) > info->fix.smem_len) {
pr_debug("%s: Memory Limit requested yres_virtual = %u\n",
- __FUNCTION__, var->yres_virtual);
+ __func__, var->yres_virtual);
return -ENOMEM;
}
#define DEBUG
#ifdef DEBUG
-#define DPRINTK(fmt, args...) printk(KERN_DEBUG "%s: " fmt,__FUNCTION__,## args)
+#define DPRINTK(fmt, args...) printk(KERN_DEBUG "%s: " fmt,__func__,## args)
#else
#define DPRINTK(fmt, args...)
#endif
/* debug output */
#ifdef CIRRUSFB_DEBUG
#define DPRINTK(fmt, args...) \
- printk(KERN_DEBUG "%s: " fmt, __FUNCTION__ , ## args)
+ printk(KERN_DEBUG "%s: " fmt, __func__ , ## args)
#else
#define DPRINTK(fmt, args...)
#endif
#define assert(expr) \
if (!(expr)) { \
printk("Assertion failed! %s,%s,%s,line=%d\n", \
- #expr, __FILE__, __FUNCTION__, __LINE__); \
+ #expr, __FILE__, __func__, __LINE__); \
}
#else
#define assert(expr)
#include "fbcon.h"
#ifdef FBCONDEBUG
-# define DPRINTK(fmt, args...) printk(KERN_DEBUG "%s: " fmt, __FUNCTION__ , ## args)
+# define DPRINTK(fmt, args...) printk(KERN_DEBUG "%s: " fmt, __func__ , ## args)
#else
# define DPRINTK(fmt, args...)
#endif
dp = pci_device_to_OF_node(pdev);
if(dp)
- printk(KERN_INFO "%s: OF name %s\n",__FUNCTION__, dp->name);
+ printk(KERN_INFO "%s: OF name %s\n",__func__, dp->name);
else
printk(KERN_ERR "imsttfb: no OF node for pci device\n");
#endif /* CONFIG_PPC_OF */
static int imxfb_suspend(struct platform_device *dev, pm_message_t state)
{
struct imxfb_info *fbi = platform_get_drvdata(dev);
- pr_debug("%s\n",__FUNCTION__);
+ pr_debug("%s\n",__func__);
imxfb_disable_controller(fbi);
return 0;
static int imxfb_resume(struct platform_device *dev)
{
struct imxfb_info *fbi = platform_get_drvdata(dev);
- pr_debug("%s\n",__FUNCTION__);
+ pr_debug("%s\n",__func__);
imxfb_enable_controller(fbi);
return 0;
struct fb_info *info = dev_get_drvdata(dev);
struct imxfb_info *fbi = info->par;
- pr_debug("%s\n",__FUNCTION__);
+ pr_debug("%s\n",__func__);
info->pseudo_palette = kmalloc( sizeof(u32) * 16, GFP_KERNEL);
if (!info->pseudo_palette)
unsigned int fvco;
unsigned int p;
- DBG(__FUNCTION__)
+ DBG(__func__)
/* only for devices older than G450 */
static void DAC1064_setpclk(WPMINFO unsigned long fout) {
unsigned int m, n, p;
- DBG(__FUNCTION__)
+ DBG(__func__)
DAC1064_calcclock(PMINFO fout, ACCESS_FBINFO(max_pixel_clock), &m, &n, &p);
ACCESS_FBINFO(hw).DACclk[0] = m;
u_int32_t mx;
struct matrox_hw_state* hw = &ACCESS_FBINFO(hw);
- DBG(__FUNCTION__)
+ DBG(__func__)
if (ACCESS_FBINFO(devflags.noinit)) {
/* read MCLK and give up... */
static int DAC1064_init_1(WPMINFO struct my_timming* m) {
struct matrox_hw_state* hw = &ACCESS_FBINFO(hw);
- DBG(__FUNCTION__)
+ DBG(__func__)
memcpy(hw->DACreg, MGA1064_DAC, sizeof(MGA1064_DAC_regs));
switch (ACCESS_FBINFO(fbcon).var.bits_per_pixel) {
static int DAC1064_init_2(WPMINFO struct my_timming* m) {
struct matrox_hw_state* hw = &ACCESS_FBINFO(hw);
- DBG(__FUNCTION__)
+ DBG(__func__)
if (ACCESS_FBINFO(fbcon).var.bits_per_pixel > 16) { /* 256 entries */
int i;
CRITFLAGS
- DBG(__FUNCTION__)
+ DBG(__func__)
CRITBEGIN
unsigned int i;
#endif
- DBG(__FUNCTION__)
+ DBG(__func__)
#ifdef DEBUG
dprintk(KERN_DEBUG "DAC1064regs ");
static int MGA1064_init(WPMINFO struct my_timming* m) {
struct matrox_hw_state* hw = &ACCESS_FBINFO(hw);
- DBG(__FUNCTION__)
+ DBG(__func__)
if (DAC1064_init_1(PMINFO m)) return 1;
if (matroxfb_vgaHWinit(PMINFO m)) return 1;
static int MGAG100_init(WPMINFO struct my_timming* m) {
struct matrox_hw_state* hw = &ACCESS_FBINFO(hw);
- DBG(__FUNCTION__)
+ DBG(__func__)
if (DAC1064_init_1(PMINFO m)) return 1;
hw->MXoptionReg &= ~0x2000;
#ifdef CONFIG_FB_MATROX_MYSTIQUE
static void MGA1064_ramdac_init(WPMINFO2) {
- DBG(__FUNCTION__)
+ DBG(__func__)
/* ACCESS_FBINFO(features.DAC1064.vco_freq_min) = 120000; */
ACCESS_FBINFO(features.pll.vco_freq_min) = 62000;
int selClk;
int clk;
- DBG(__FUNCTION__)
+ DBG(__func__)
outDAC1064(PMINFO M1064_XPIXCLKCTRL, inDAC1064(PMINFO M1064_XPIXCLKCTRL) | M1064_XPIXCLKCTRL_DIS |
M1064_XPIXCLKCTRL_PLL_UP);
static void MGAG100_setPixClock(CPMINFO int flags, int freq) {
unsigned int m, n, p;
- DBG(__FUNCTION__)
+ DBG(__func__)
DAC1064_calcclock(PMINFO freq, ACCESS_FBINFO(max_pixel_clock), &m, &n, &p);
MGAG100_progPixClock(PMINFO flags, m, n, p);
2048, 0};
struct matrox_hw_state* hw = &ACCESS_FBINFO(hw);
- DBG(__FUNCTION__)
+ DBG(__func__)
/* ACCESS_FBINFO(capable.cfb4) = 0; ... preinitialized by 0 */
ACCESS_FBINFO(capable.text) = 1;
static void MGA1064_reset(WPMINFO2) {
- DBG(__FUNCTION__);
+ DBG(__func__);
MGA1064_ramdac_init(PMINFO2);
}
u_int32_t q;
#endif
- DBG(__FUNCTION__)
+ DBG(__func__)
/* there are some instabilities if in_div > 19 && vco < 61000 */
if (ACCESS_FBINFO(devflags.g450dac)) {
u_int8_t b;
struct matrox_hw_state* hw = &ACCESS_FBINFO(hw);
- DBG(__FUNCTION__)
+ DBG(__func__)
{
#ifdef G100_BROKEN_IBM_82351
CRITFLAGS
- DBG(__FUNCTION__)
+ DBG(__func__)
CRITBEGIN
CRITFLAGS
- DBG(__FUNCTION__)
+ DBG(__func__)
CRITBEGIN
unsigned int fvco;
unsigned int lin, lfeed, lpost;
- DBG(__FUNCTION__)
+ DBG(__func__)
fvco = PLL_calcclock(PMINFO freq, fmax, &lin, &lfeed, &lpost);
fvco >>= (*post = lpost);
unsigned int pixfeed, pixin, pixpost;
struct matrox_hw_state* hw = &ACCESS_FBINFO(hw);
- DBG(__FUNCTION__)
+ DBG(__func__)
f_pll = Ti3026_calcclock(PMINFO clk, ACCESS_FBINFO(max_pixel_clock), &pixin, &pixfeed, &pixpost);
u_int8_t muxctrl = isInterleave(MINFO) ? TVP3026_XMUXCTRL_MEMORY_64BIT : TVP3026_XMUXCTRL_MEMORY_32BIT;
struct matrox_hw_state* hw = &ACCESS_FBINFO(hw);
- DBG(__FUNCTION__)
+ DBG(__func__)
memcpy(hw->DACreg, MGADACbpp32, sizeof(hw->DACreg));
switch (ACCESS_FBINFO(fbcon).var.bits_per_pixel) {
unsigned int rfhcnt, mclk_ctl;
int tmout;
- DBG(__FUNCTION__)
+ DBG(__func__)
f_pll = Ti3026_calcclock(PMINFO fout, ACCESS_FBINFO(max_pixel_clock), &mclk_n, &mclk_m, &mclk_p);
static void ti3026_ramdac_init(WPMINFO2) {
- DBG(__FUNCTION__)
+ DBG(__func__)
ACCESS_FBINFO(features.pll.vco_freq_min) = 110000;
ACCESS_FBINFO(features.pll.ref_freq) = 114545;
struct matrox_hw_state* hw = &ACCESS_FBINFO(hw);
CRITFLAGS
- DBG(__FUNCTION__)
+ DBG(__func__)
#ifdef DEBUG
dprintk(KERN_INFO "EXTVGA regs: ");
static void Ti3026_reset(WPMINFO2) {
- DBG(__FUNCTION__)
+ DBG(__func__)
ti3026_ramdac_init(PMINFO2);
}
2048, 0};
struct matrox_hw_state* hw = &ACCESS_FBINFO(hw);
- DBG(__FUNCTION__)
+ DBG(__func__)
ACCESS_FBINFO(millenium) = 1;
ACCESS_FBINFO(milleniumII) = (ACCESS_FBINFO(pcidev)->device != PCI_DEVICE_ID_MATROX_MIL);
u_int32_t mopmode;
int accel;
- DBG(__FUNCTION__)
+ DBG(__func__)
mpitch = ACCESS_FBINFO(fbcon).var.xres_virtual;
int start, end;
CRITFLAGS
- DBG(__FUNCTION__)
+ DBG(__func__)
CRITBEGIN
int start, end;
CRITFLAGS
- DBG(__FUNCTION__)
+ DBG(__func__)
CRITBEGIN
int width) {
CRITFLAGS
- DBG(__FUNCTION__)
+ DBG(__func__)
CRITBEGIN
int whattodo;
CRITFLAGS
- DBG(__FUNCTION__)
+ DBG(__func__)
CRITBEGIN
int easy;
CRITFLAGS
- DBG_HEAVY(__FUNCTION__);
+ DBG_HEAVY(__func__);
step = (width + 7) >> 3;
charcell = height * step;
static void matroxfb_imageblit(struct fb_info* info, const struct fb_image* image) {
MINFO_FROM_INFO(info);
- DBG_HEAVY(__FUNCTION__);
+ DBG_HEAVY(__func__);
if (image->depth == 1) {
u_int32_t fgx, bgx;
CRITFLAGS
- DBG(__FUNCTION__)
+ DBG(__func__)
if (ACCESS_FBINFO(dead))
return;
{
MINFO_FROM_INFO(info);
- DBG_LOOP(__FUNCTION__)
+ DBG_LOOP(__func__)
if (ACCESS_FBINFO(dead)) {
return -ENXIO;
{
MINFO_FROM_INFO(info);
- DBG_LOOP(__FUNCTION__)
+ DBG_LOOP(__func__)
if (user) {
if (0 == --ACCESS_FBINFO(userusecount)) {
struct fb_info* info) {
MINFO_FROM_INFO(info);
- DBG(__FUNCTION__)
+ DBG(__func__)
matrox_pan_var(PMINFO var);
return 0;
static int matroxfb_get_final_bppShift(CPMINFO int bpp) {
int bppshft2;
- DBG(__FUNCTION__)
+ DBG(__func__)
bppshft2 = bpp;
if (!bppshft2) {
int over;
int rounding;
- DBG(__FUNCTION__)
+ DBG(__func__)
switch (bpp) {
case 0: return xres;
const int* width;
int xres_new;
- DBG(__FUNCTION__)
+ DBG(__func__)
if (!bpp) return xres;
static int matroxfb_get_cmap_len(struct fb_var_screeninfo *var) {
- DBG(__FUNCTION__)
+ DBG(__func__)
switch (var->bits_per_pixel) {
case 4:
unsigned int vramlen;
unsigned int memlen;
- DBG(__FUNCTION__)
+ DBG(__func__)
switch (bpp) {
case 4: if (!ACCESS_FBINFO(capable.cfb4)) return -EINVAL;
struct matrox_fb_info* minfo = container_of(fb_info, struct matrox_fb_info, fbcon);
#endif
- DBG(__FUNCTION__)
+ DBG(__func__)
/*
* Set a single color register. The values supplied are
static void matroxfb_init_fix(WPMINFO2)
{
struct fb_fix_screeninfo *fix = &ACCESS_FBINFO(fbcon).fix;
- DBG(__FUNCTION__)
+ DBG(__func__)
strcpy(fix->id,"MATROX");
static void matroxfb_update_fix(WPMINFO2)
{
struct fb_fix_screeninfo *fix = &ACCESS_FBINFO(fbcon).fix;
- DBG(__FUNCTION__)
+ DBG(__func__)
fix->smem_start = ACCESS_FBINFO(video.base) + ACCESS_FBINFO(curr.ydstorg.bytes);
fix->smem_len = ACCESS_FBINFO(video.len_usable) - ACCESS_FBINFO(curr.ydstorg.bytes);
struct fb_var_screeninfo *var;
MINFO_FROM_INFO(info);
- DBG(__FUNCTION__)
+ DBG(__func__)
if (ACCESS_FBINFO(dead)) {
return -ENXIO;
void __user *argp = (void __user *)arg;
MINFO_FROM_INFO(info);
- DBG(__FUNCTION__)
+ DBG(__func__)
if (ACCESS_FBINFO(dead)) {
return -ENXIO;
CRITFLAGS
MINFO_FROM_INFO(info);
- DBG(__FUNCTION__)
+ DBG(__func__)
if (ACCESS_FBINFO(dead))
return 1;
unsigned char bytes[32];
unsigned char* tmp;
- DBG(__FUNCTION__)
+ DBG(__func__)
vm = ACCESS_FBINFO(video.vbase);
maxSize &= ~0x1FFFFF; /* must be X*2MB (really it must be 2 or X*4MB) */
{ },
};
- DBG(__FUNCTION__)
+ DBG(__func__)
/* set default values... */
vesafb_defined.accel_flags = FB_ACCELF_TEXT;
#ifndef CONFIG_FB_MATROX_MULTIHEAD
static int registered = 0;
#endif
- DBG(__FUNCTION__)
+ DBG(__func__)
svid = pdev->subsystem_vendor;
sid = pdev->subsystem_device;
static int __init matroxfb_setup(char *options) {
char *this_opt;
- DBG(__FUNCTION__)
+ DBG(__func__)
if (!options || !*options)
return 0;
char *option = NULL;
int err = 0;
- DBG(__FUNCTION__)
+ DBG(__func__)
if (fb_get_options("matroxfb", &option))
return -ENODEV;
int __init init_module(void){
- DBG(__FUNCTION__)
+ DBG(__func__)
if (disabled)
return -ENXIO;
#define m2info (container_of(info, struct matroxfb_dh_fb_info, fbcon))
MINFO_FROM(m2info->primary_dev);
- DBG(__FUNCTION__)
+ DBG(__func__)
switch (cmd) {
case FBIOGET_VBLANK:
unsigned int scrlen;
unsigned int fmax;
- DBG(__FUNCTION__)
+ DBG(__func__)
scrlen = htotal * (vtotal - 1);
fwant = htotal * vtotal;
#include <linux/matroxfb.h>
void matroxfb_DAC_out(CPMINFO int reg, int val) {
- DBG_REG(__FUNCTION__)
+ DBG_REG(__func__)
mga_outb(M_RAMDAC_BASE+M_X_INDEX, reg);
mga_outb(M_RAMDAC_BASE+M_X_DATAREG, val);
}
int matroxfb_DAC_in(CPMINFO int reg) {
- DBG_REG(__FUNCTION__)
+ DBG_REG(__func__)
mga_outb(M_RAMDAC_BASE+M_X_INDEX, reg);
return mga_inb(M_RAMDAC_BASE+M_X_DATAREG);
}
void matroxfb_var2my(struct fb_var_screeninfo* var, struct my_timming* mt) {
unsigned int pixclock = var->pixclock;
- DBG(__FUNCTION__)
+ DBG(__func__)
if (!pixclock) pixclock = 10000; /* 10ns = 100MHz */
mt->pixclock = 1000000000 / pixclock;
unsigned int fwant;
unsigned int p;
- DBG(__FUNCTION__)
+ DBG(__func__)
fwant = freq;
int i;
struct matrox_hw_state * const hw = &ACCESS_FBINFO(hw);
- DBG(__FUNCTION__)
+ DBG(__func__)
hw->SEQ[0] = 0x00;
hw->SEQ[1] = 0x01; /* or 0x09 */
struct matrox_hw_state * const hw = &ACCESS_FBINFO(hw);
CRITFLAGS
- DBG(__FUNCTION__)
+ DBG(__func__)
dprintk(KERN_INFO "MiscOutReg: %02X\n", hw->MiscOutReg);
dprintk(KERN_INFO "SEQ regs: ");
((v).xres == (x) && (v).yres == (y))
#ifdef DEBUG
-#define DPRINTK(fmt, args...) printk("modedb %s: " fmt, __FUNCTION__ , ## args)
+#define DPRINTK(fmt, args...) printk("modedb %s: " fmt, __func__ , ## args)
#else
#define DPRINTK(fmt, args...)
#endif
#define NVTRACE if (0) printk
#endif
-#define NVTRACE_ENTER(...) NVTRACE("%s START\n", __FUNCTION__)
-#define NVTRACE_LEAVE(...) NVTRACE("%s END\n", __FUNCTION__)
+#define NVTRACE_ENTER(...) NVTRACE("%s START\n", __func__)
+#define NVTRACE_LEAVE(...) NVTRACE("%s END\n", __func__)
#ifdef CONFIG_FB_NVIDIA_DEBUG
#define assert(expr) \
if (!(expr)) { \
printk( "Assertion failed! %s,%s,%s,line=%d\n",\
- #expr,__FILE__,__FUNCTION__,__LINE__); \
+ #expr,__FILE__,__func__,__LINE__); \
BUG(); \
}
#else
#undef PM2FB_MASTER_DEBUG
#ifdef PM2FB_MASTER_DEBUG
#define DPRINTK(a, b...) \
- printk(KERN_DEBUG "pm2fb: %s: " a, __FUNCTION__ , ## b)
+ printk(KERN_DEBUG "pm2fb: %s: " a, __func__ , ## b)
#else
#define DPRINTK(a, b...)
#endif
#undef PM3FB_MASTER_DEBUG
#ifdef PM3FB_MASTER_DEBUG
#define DPRINTK(a, b...) \
- printk(KERN_DEBUG "pm3fb: %s: " a, __FUNCTION__ , ## b)
+ printk(KERN_DEBUG "pm3fb: %s: " a, __func__ , ## b)
#else
#define DPRINTK(a, b...)
#endif
#define NVTRACE if(0) printk
#endif
-#define NVTRACE_ENTER(...) NVTRACE("%s START\n", __FUNCTION__)
-#define NVTRACE_LEAVE(...) NVTRACE("%s END\n", __FUNCTION__)
+#define NVTRACE_ENTER(...) NVTRACE("%s START\n", __func__)
+#define NVTRACE_LEAVE(...) NVTRACE("%s END\n", __func__)
#ifdef CONFIG_FB_RIVA_DEBUG
#define assert(expr) \
if(!(expr)) { \
printk( "Assertion failed! %s,%s,%s,line=%d\n",\
- #expr,__FILE__,__FUNCTION__,__LINE__); \
+ #expr,__FILE__,__func__,__LINE__); \
BUG(); \
}
#else
struct fb_var_screeninfo *var = &info->var;
int clkdiv = s3c2410fb_calc_pixclk(fbi, var->pixclock) / 2;
- dprintk("%s: var->xres = %d\n", __FUNCTION__, var->xres);
- dprintk("%s: var->yres = %d\n", __FUNCTION__, var->yres);
- dprintk("%s: var->bpp = %d\n", __FUNCTION__, var->bits_per_pixel);
+ dprintk("%s: var->xres = %d\n", __func__, var->xres);
+ dprintk("%s: var->yres = %d\n", __func__, var->yres);
+ dprintk("%s: var->bpp = %d\n", __func__, var->bits_per_pixel);
if (type == S3C2410_LCDCON1_TFT) {
s3c2410fb_calculate_tft_lcd_regs(info, &fbi->regs);
* Debug macros
*/
#if DEBUG
-# define DPRINTK(fmt, args...) printk("%s: " fmt, __FUNCTION__ , ## args)
+# define DPRINTK(fmt, args...) printk("%s: " fmt, __func__ , ## args)
#else
# define DPRINTK(fmt, args...)
#endif
#undef SISFBDEBUG
#ifdef SISFBDEBUG
-#define DPRINTK(fmt, args...) printk(KERN_DEBUG "%s: " fmt, __FUNCTION__ , ## args)
+#define DPRINTK(fmt, args...) printk(KERN_DEBUG "%s: " fmt, __func__ , ## args)
#define TWDEBUG(x) printk(KERN_INFO x "\n");
#else
#define DPRINTK(fmt, args...)
break;
default:
dprintk("%s: wrong clock code '%d'\n",
- __FUNCTION__, clock);
+ __func__, clock);
return 0;
}
udelay(300);
break;
default:
dprintk("%s: wrong clock code '%d'\n",
- __FUNCTION__, clock);
+ __func__, clock);
return 0;
}
udelay(300);
sst_dac_write(DACREG_RMR, (cr0 & 0x0f) | DACREG_CR0_16BPP);
break;
default:
- dprintk("%s: bad depth '%u'\n", __FUNCTION__, bpp);
+ dprintk("%s: bad depth '%u'\n", __func__, bpp);
break;
}
}
sst_dac_write(DACREG_ICS_CMD, DACREG_ICS_CMD_16BPP);
break;
default:
- dprintk("%s: bad depth '%u'\n", __FUNCTION__, bpp);
+ dprintk("%s: bad depth '%u'\n", __func__, bpp);
break;
}
}
}
if (!ret)
return 0;
- f_dprintk("%s found %s\n", __FUNCTION__, dacs[i].name);
+ f_dprintk("%s found %s\n", __func__, dacs[i].name);
par->dac_sw = dacs[i];
return 1;
}
# define DEBUG_ON() debug_on=1
# define WRITE_BYTE(value,fb,reg) do { if (debug_on) \
printk(KERN_DEBUG "%30s: WRITE_BYTE(0x%06x) = 0x%02x (old=0x%02x)\n", \
- __FUNCTION__, reg, value, READ_BYTE(fb,reg)); \
+ __func__, reg, value, READ_BYTE(fb,reg)); \
gsc_writeb((value),(fb)->info.fix.mmio_start + (reg)); } while (0)
# define WRITE_WORD(value,fb,reg) do { if (debug_on) \
printk(KERN_DEBUG "%30s: WRITE_WORD(0x%06x) = 0x%08x (old=0x%08x)\n", \
- __FUNCTION__, reg, value, READ_WORD(fb,reg)); \
+ __func__, reg, value, READ_WORD(fb,reg)); \
gsc_writel((value),(fb)->info.fix.mmio_start + (reg)); } while (0)
#endif /* DEBUG_STIFB_REGS */
#define DEBUG
#ifdef DEBUG
-#define DPRINTK(fmt, args...) printk(KERN_DEBUG "%s: " fmt,__FUNCTION__,## args)
+#define DPRINTK(fmt, args...) printk(KERN_DEBUG "%s: " fmt,__func__,## args)
#else
#define DPRINTK(fmt, args...)
#endif
#include <video/tdfx.h>
-#define DPRINTK(a, b...) pr_debug("fb: %s: " a, __FUNCTION__ , ## b)
+#define DPRINTK(a, b...) pr_debug("fb: %s: " a, __func__ , ## b)
#ifdef CONFIG_MTRR
#include <asm/mtrr.h>