With more recent PHY firmware versions (>8.1.0.0.116), we need to use
the correct value for the pwr_limit_reference_11_abg parameter when
setting the mac_and_phy options.
For now we use a hardcoded 0xc8 as the value. This will be moved to
the configuration binary when it gets implemented.
Signed-off-by: Luciano Coelho <coelho@ti.com>
Signed-off-by: Arik Nemtsov <arik@wizery.com>
u8 primary_clock_setting_time;
u8 clock_valid_on_wake_up;
u8 secondary_clock_setting_time;
+ u8 pwr_limit_reference_11_abg;
};
struct wl18xx_priv_conf {
.enable_clpc = 0x00,
.enable_tx_low_pwr_on_siso_rdl = 0x00,
.rx_profile = 0x00,
+ .pwr_limit_reference_11_abg = 0xc8,
},
};
phy->clock_valid_on_wake_up;
params.secondary_clock_setting_time =
phy->secondary_clock_setting_time;
+ params.pwr_limit_reference_11_abg =
+ phy->pwr_limit_reference_11_abg;
params.board_type = priv->board_type;