#include "CodeRegion.h"
+namespace llvm {
namespace mca {
bool CodeRegion::isLocInRange(llvm::SMLoc Loc) const {
}
} // namespace mca
+} // namespace llvm
#include "llvm/Support/SourceMgr.h"
#include <vector>
+namespace llvm {
namespace mca {
/// A region of assembly code.
};
} // namespace mca
+} // namespace llvm
#endif
#include "PipelinePrinter.h"
#include "Views/View.h"
+namespace llvm {
namespace mca {
void PipelinePrinter::printReport(llvm::raw_ostream &OS) const {
V->printView(OS);
}
} // namespace mca.
+} // namespace llvm
#define DEBUG_TYPE "llvm-mca"
+namespace llvm {
namespace mca {
/// A printer class that knows how to collects statistics on the
void printReport(llvm::raw_ostream &OS) const;
};
} // namespace mca
+} // namespace llvm
#endif // LLVM_TOOLS_LLVM_MCA_PIPELINEPRINTER_H
#include "Views/DispatchStatistics.h"
#include "llvm/Support/Format.h"
-using namespace llvm;
-
+namespace llvm {
namespace mca {
void DispatchStatistics::onEvent(const HWStallEvent &Event) {
}
} // namespace mca
+} // namespace llvm
#include "llvm/MC/MCSubtargetInfo.h"
#include <map>
+namespace llvm {
namespace mca {
class DispatchStatistics : public View {
}
};
} // namespace mca
+} // namespace llvm
#endif
#include "Views/InstructionInfoView.h"
+namespace llvm {
namespace mca {
-using namespace llvm;
-
void InstructionInfoView::printView(raw_ostream &OS) const {
std::string Buffer;
raw_string_ostream TempStream(Buffer);
OS << Buffer;
}
} // namespace mca.
+} // namespace llvm
#define DEBUG_TYPE "llvm-mca"
+namespace llvm {
namespace mca {
/// A view that prints out generic instruction information.
void printView(llvm::raw_ostream &OS) const override;
};
} // namespace mca
+} // namespace llvm
#endif
#include "Views/RegisterFileStatistics.h"
#include "llvm/Support/Format.h"
-using namespace llvm;
-
+namespace llvm {
namespace mca {
RegisterFileStatistics::RegisterFileStatistics(const MCSubtargetInfo &sti)
}
} // namespace mca
+} // namespace llvm
#include "llvm/ADT/SmallVector.h"
#include "llvm/MC/MCSubtargetInfo.h"
+namespace llvm {
namespace mca {
class RegisterFileStatistics : public View {
void printView(llvm::raw_ostream &OS) const override;
};
} // namespace mca
+} // namespace llvm
#endif
#include "llvm/Support/FormattedStream.h"
#include "llvm/Support/raw_ostream.h"
+namespace llvm {
namespace mca {
-using namespace llvm;
-
ResourcePressureView::ResourcePressureView(const llvm::MCSubtargetInfo &sti,
MCInstPrinter &Printer,
ArrayRef<MCInst> S)
}
}
} // namespace mca
+} // namespace llvm
#include "llvm/MC/MCInstPrinter.h"
#include "llvm/MC/MCSubtargetInfo.h"
+namespace llvm {
namespace mca {
/// This class collects resource pressure statistics and it is able to print
}
};
} // namespace mca
+} // namespace llvm
#endif
#include "Views/RetireControlUnitStatistics.h"
#include "llvm/Support/Format.h"
-using namespace llvm;
-
+namespace llvm {
namespace mca {
void RetireControlUnitStatistics::onEvent(const HWInstructionEvent &Event) {
}
} // namespace mca
+} // namespace llvm
#include "llvm/MC/MCSubtargetInfo.h"
#include <map>
+namespace llvm {
namespace mca {
class RetireControlUnitStatistics : public View {
void printView(llvm::raw_ostream &OS) const override;
};
} // namespace mca
+} // namespace llvm
#endif
#include "llvm/Support/Format.h"
#include "llvm/Support/FormattedStream.h"
-using namespace llvm;
-
+namespace llvm {
namespace mca {
void SchedulerStatistics::onEvent(const HWInstructionEvent &Event) {
}
} // namespace mca
+} // namespace llvm
#include "llvm/MC/MCSubtargetInfo.h"
#include <map>
+namespace llvm {
namespace mca {
class SchedulerStatistics final : public View {
void printView(llvm::raw_ostream &OS) const override;
};
} // namespace mca
+} // namespace llvm
#endif
#include "llvm/ADT/SmallVector.h"
#include "llvm/Support/Format.h"
+namespace llvm {
namespace mca {
#define DEBUG_TYPE "llvm-mca"
-using namespace llvm;
-
SummaryView::SummaryView(const MCSchedModel &Model, ArrayRef<MCInst> S,
unsigned Width)
: SM(Model), Source(S), DispatchWidth(Width), LastInstructionIdx(0),
OS << Buffer;
}
} // namespace mca.
+} // namespace llvm
#include "llvm/MC/MCSchedule.h"
#include "llvm/Support/raw_ostream.h"
+namespace llvm {
namespace mca {
/// A view that collects and prints a few performance numbers.
void printView(llvm::raw_ostream &OS) const override;
};
} // namespace mca
+} // namespace llvm
#endif
#include "Views/TimelineView.h"
-using namespace llvm;
-
+namespace llvm {
namespace mca {
TimelineView::TimelineView(const MCSubtargetInfo &sti, MCInstPrinter &Printer,
}
}
} // namespace mca
+} // namespace llvm
#include "llvm/Support/FormattedStream.h"
#include "llvm/Support/raw_ostream.h"
+namespace llvm {
namespace mca {
/// This class listens to instruction state transition events
}
};
} // namespace mca
+} // namespace llvm
#endif
#include "Views/View.h"
+namespace llvm {
namespace mca {
void View::anchor() {}
} // namespace mca
+} // namespace llvm
#include "HWEventListener.h"
#include "llvm/Support/raw_ostream.h"
+namespace llvm {
namespace mca {
class View : public HWEventListener {
void anchor() override;
};
} // namespace mca
+} // namespace llvm
#endif
#include "llvm/MC/MCSubtargetInfo.h"
#include <memory>
+namespace llvm {
namespace mca {
/// This is a convenience struct to hold the parameters necessary for creating
};
} // namespace mca
+} // namespace llvm
#endif // LLVM_TOOLS_LLVM_MCA_CONTEXT_H
#include "Support.h"
#include "llvm/ADT/ArrayRef.h"
+namespace llvm {
namespace mca {
// An HWInstructionEvent represents state changes of instructions that
virtual void anchor();
};
} // namespace mca
+} // namespace llvm
#endif
#ifndef LLVM_TOOLS_LLVM_MCA_HARDWAREUNIT_H
#define LLVM_TOOLS_LLVM_MCA_HARDWAREUNIT_H
+namespace llvm {
namespace mca {
class HardwareUnit {
};
} // namespace mca
+} // namespace llvm
#endif // LLVM_TOOLS_LLVM_MCA_HARDWAREUNIT_H
#include "HardwareUnits/HardwareUnit.h"
#include <set>
+namespace llvm {
namespace mca {
class InstRef;
};
} // namespace mca
+} // namespace llvm
#endif
#include "llvm/MC/MCSchedule.h"
#include "llvm/Support/Error.h"
+namespace llvm {
namespace mca {
class ReadState;
};
} // namespace mca
+} // namespace llvm
#endif // LLVM_TOOLS_LLVM_MCA_REGISTER_FILE_H
#include "llvm/ADT/SmallVector.h"
#include "llvm/MC/MCSchedule.h"
+namespace llvm {
namespace mca {
/// Used to notify the internal state of a processor resource.
#endif
};
} // namespace mca
+} // namespace llvm
#endif // LLVM_TOOLS_LLVM_MCA_RESOURCE_MANAGER_H
#include "llvm/MC/MCSchedule.h"
#include <vector>
+namespace llvm {
namespace mca {
/// This class tracks which instructions are in-flight (i.e., dispatched but not
};
} // namespace mca
+} // namespace llvm
#endif // LLVM_TOOLS_LLVM_MCA_RETIRE_CONTROL_UNIT_H
#include "llvm/ADT/SmallVector.h"
#include "llvm/MC/MCSchedule.h"
+namespace llvm {
namespace mca {
class SchedulerStrategy {
#endif // !NDEBUG
};
} // namespace mca
+} // namespace llvm
#endif // LLVM_TOOLS_LLVM_MCA_SCHEDULER_H
#include "llvm/MC/MCSubtargetInfo.h"
#include "llvm/Support/Error.h"
+namespace llvm {
namespace mca {
/// A builder class that knows how to construct Instruction objects.
createInstruction(const llvm::MCInst &MCI);
};
} // namespace mca
+} // namespace llvm
#endif
#include <set>
#include <vector>
+namespace llvm {
namespace mca {
constexpr int UNKNOWN_CYCLES = -512;
};
} // namespace mca
+} // namespace llvm
#endif
#include "llvm/ADT/SmallVector.h"
#include "llvm/Support/Error.h"
+namespace llvm {
namespace mca {
class HWEventListener;
void addEventListener(HWEventListener *Listener);
};
} // namespace mca
+} // namespace llvm
#endif // LLVM_TOOLS_LLVM_MCA_PIPELINE_H
#include "llvm/ADT/ArrayRef.h"
+namespace llvm {
namespace mca {
class Instruction;
};
} // namespace mca
+} // namespace llvm
#endif
#include "llvm/MC/MCRegisterInfo.h"
#include "llvm/MC/MCSubtargetInfo.h"
+namespace llvm {
namespace mca {
// Implements the hardware dispatch logic.
#endif
};
} // namespace mca
+} // namespace llvm
#endif // LLVM_TOOLS_LLVM_MCA_DISPATCH_STAGE_H
#include "Stages/Stage.h"
#include "llvm/ADT/ArrayRef.h"
+namespace llvm {
namespace mca {
class ExecuteStage final : public Stage {
};
} // namespace mca
+} // namespace llvm
#endif // LLVM_TOOLS_LLVM_MCA_EXECUTE_STAGE_H
#include "Stages/Stage.h"
#include <map>
+namespace llvm {
namespace mca {
class FetchStage final : public Stage {
};
} // namespace mca
+} // namespace llvm
#endif // LLVM_TOOLS_LLVM_MCA_FETCH_STAGE_H
#include "llvm/ADT/SmallVector.h"
#include "llvm/MC/MCSchedule.h"
+namespace llvm {
namespace mca {
class InstructionTables final : public Stage {
llvm::Error execute(InstRef &IR) override;
};
} // namespace mca
+} // namespace llvm
#endif
#include "HardwareUnits/RetireControlUnit.h"
#include "Stages/Stage.h"
+namespace llvm {
namespace mca {
class RetireStage final : public Stage {
};
} // namespace mca
+} // namespace llvm
#endif // LLVM_TOOLS_LLVM_MCA_RETIRE_STAGE_H
#include "llvm/Support/Error.h"
#include <set>
+namespace llvm {
namespace mca {
class InstRef;
};
} // namespace mca
+} // namespace llvm
#endif // LLVM_TOOLS_LLVM_MCA_STAGE_H
#include "llvm/MC/MCSchedule.h"
#include "llvm/Support/Error.h"
+namespace llvm {
namespace mca {
template <typename T>
unsigned DispatchWidth, unsigned NumMicroOps,
llvm::ArrayRef<unsigned> ProcResourceUsage);
} // namespace mca
+} // namespace llvm
#endif
#include "Stages/FetchStage.h"
#include "Stages/RetireStage.h"
+namespace llvm {
namespace mca {
-using namespace llvm;
-
std::unique_ptr<Pipeline>
Context::createDefaultPipeline(const PipelineOptions &Opts, InstrBuilder &IB,
SourceMgr &SrcMgr) {
}
} // namespace mca
+} // namespace llvm
#include "HWEventListener.h"
+namespace llvm {
namespace mca {
// Anchor the vtable here.
void HWEventListener::anchor() {}
} // namespace mca
+} // namespace llvm
#include "HardwareUnits/HardwareUnit.h"
+namespace llvm {
namespace mca {
// Pin the vtable with this method.
HardwareUnit::~HardwareUnit() = default;
} // namespace mca
+} // namespace llvm
#include "llvm/Support/Debug.h"
#include "llvm/Support/raw_ostream.h"
-using namespace llvm;
-
#define DEBUG_TYPE "llvm-mca"
+namespace llvm {
namespace mca {
#ifndef NDEBUG
}
}
} // namespace mca
+} // namespace llvm
#include "Instruction.h"
#include "llvm/Support/Debug.h"
-using namespace llvm;
-
#define DEBUG_TYPE "llvm-mca"
+namespace llvm {
namespace mca {
RegisterFile::RegisterFile(const MCSchedModel &SM, const MCRegisterInfo &mri,
#endif
} // namespace mca
+} // namespace llvm
#include "llvm/Support/Debug.h"
#include "llvm/Support/raw_ostream.h"
+namespace llvm {
namespace mca {
-using namespace llvm;
-
#define DEBUG_TYPE "llvm-mca"
ResourceStrategy::~ResourceStrategy() = default;
}
} // namespace mca
+} // namespace llvm
#include "HardwareUnits/RetireControlUnit.h"
#include "llvm/Support/Debug.h"
-using namespace llvm;
-
#define DEBUG_TYPE "llvm-mca"
+namespace llvm {
namespace mca {
RetireControlUnit::RetireControlUnit(const MCSchedModel &SM)
#endif
} // namespace mca
+} // namespace llvm
#include "llvm/Support/Debug.h"
#include "llvm/Support/raw_ostream.h"
+namespace llvm {
namespace mca {
-using namespace llvm;
-
#define DEBUG_TYPE "llvm-mca"
void Scheduler::initializeStrategy(std::unique_ptr<SchedulerStrategy> S) {
}
} // namespace mca
+} // namespace llvm
#define DEBUG_TYPE "llvm-mca"
+namespace llvm {
namespace mca {
-using namespace llvm;
-
InstrBuilder::InstrBuilder(const llvm::MCSubtargetInfo &sti,
const llvm::MCInstrInfo &mcii,
const llvm::MCRegisterInfo &mri,
return std::move(NewIS);
}
} // namespace mca
+} // namespace llvm
#include "llvm/Support/Debug.h"
#include "llvm/Support/raw_ostream.h"
+namespace llvm {
namespace mca {
-using namespace llvm;
-
void ReadState::writeStartEvent(unsigned Cycles) {
assert(DependentWrites);
assert(CyclesLeft == UNKNOWN_CYCLES);
const unsigned WriteRef::INVALID_IID = std::numeric_limits<unsigned>::max();
} // namespace mca
+} // namespace llvm
#include "HWEventListener.h"
#include "llvm/Support/Debug.h"
+namespace llvm {
namespace mca {
#define DEBUG_TYPE "llvm-mca"
-using namespace llvm;
-
void Pipeline::addEventListener(HWEventListener *Listener) {
if (Listener)
Listeners.insert(Listener);
Listener->onCycleEnd();
}
} // namespace mca.
+} // namespace llvm
#include "HardwareUnits/Scheduler.h"
#include "llvm/Support/Debug.h"
-using namespace llvm;
-
#define DEBUG_TYPE "llvm-mca"
+namespace llvm {
namespace mca {
void DispatchStage::notifyInstructionDispatched(const InstRef &IR,
}
#endif
} // namespace mca
+} // namespace llvm
#define DEBUG_TYPE "llvm-mca"
+namespace llvm {
namespace mca {
-using namespace llvm;
-
HWStallEvent::GenericEventType toHWStallEventType(Scheduler::Status Status) {
switch (Status) {
case Scheduler::SC_LOAD_QUEUE_FULL:
}
} // namespace mca
+} // namespace llvm
#include "Stages/FetchStage.h"
#include "Instruction.h"
+namespace llvm {
namespace mca {
bool FetchStage::hasWorkToComplete() const { return CurrentInstruction; }
}
} // namespace mca
+} // namespace llvm
#include "Stages/InstructionTables.h"
+namespace llvm {
namespace mca {
-using namespace llvm;
-
Error InstructionTables::execute(InstRef &IR) {
const InstrDesc &Desc = IR.getInstruction()->getDesc();
UsedResources.clear();
}
} // namespace mca
+} // namespace llvm
#define DEBUG_TYPE "llvm-mca"
+namespace llvm {
namespace mca {
llvm::Error RetireStage::cycleStart() {
}
} // namespace mca
+} // namespace llvm
#include "Stages/Stage.h"
+namespace llvm {
namespace mca {
// Pin the vtable here in the implementation file.
}
} // namespace mca
+} // namespace llvm
#include "Support.h"
#include "llvm/MC/MCSchedule.h"
+namespace llvm {
namespace mca {
-using namespace llvm;
-
void computeProcResourceMasks(const MCSchedModel &SM,
SmallVectorImpl<uint64_t> &Masks) {
unsigned ProcResourceID = 0;
}
} // namespace mca
+} // namespace llvm
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