include/opcode/
authorRichard Sandiford <rdsandiford@googlemail.com>
Tue, 15 Jul 2003 07:50:39 +0000 (07:50 +0000)
committerRichard Sandiford <rdsandiford@googlemail.com>
Tue, 15 Jul 2003 07:50:39 +0000 (07:50 +0000)
* mips.h (CPU_RM7000): New macro.
(OPCODE_IS_MEMBER): Match CPU_RM7000 against 4650 insns.

bfd/
* archures.c (bfd_mach_mips7000): New.
* bfd-in2.h: Regenerated.
* cpu-mips.c (arch_info_struct): Add an entry for mips:7000.
* elfxx-mips.c (mips_set_isa_flags): Handle bfd_mach_mips7000.
(mips_mach_extensions): Add an entry for it.

opcodes/
* mips-dis.c (mips_arch_choices): Add rm7000 and rm9000 entries.

gas/
* config/tc-mips.c (hilo_interlocks): True for CPU_RM7000.
(mips_cpu_info_table): Add rm7000 and rm9000 entries.

gas/testsuite/
* gas/mips/rm7000.[sd]: New test.
* gas/mips/mips.exp: Run it.

15 files changed:
bfd/ChangeLog
bfd/archures.c
bfd/bfd-in2.h
bfd/cpu-mips.c
bfd/elfxx-mips.c
gas/ChangeLog
gas/config/tc-mips.c
gas/testsuite/ChangeLog
gas/testsuite/gas/mips/mips.exp
gas/testsuite/gas/mips/rm7000.d [new file with mode: 0644]
gas/testsuite/gas/mips/rm7000.s [new file with mode: 0644]
include/opcode/ChangeLog
include/opcode/mips.h
opcodes/ChangeLog
opcodes/mips-dis.c

index 251fb85..7ed0b1e 100644 (file)
@@ -1,3 +1,11 @@
+2003-07-15  Richard Sandiford  <rsandifo@redhat.com>
+
+       * archures.c (bfd_mach_mips7000): New.
+       * bfd-in2.h: Regenerated.
+       * cpu-mips.c (arch_info_struct): Add an entry for mips:7000.
+       * elfxx-mips.c (mips_set_isa_flags): Handle bfd_mach_mips7000.
+       (mips_mach_extensions): Add an entry for it.
+
 2003-07-14  Nick Clifton  <nickc@redhat.com>
 
        * po/tr.po: Update with latest version.
index d339c5e..77f6a9e 100644 (file)
@@ -138,6 +138,7 @@ DESCRIPTION
 .#define bfd_mach_mips5400             5400
 .#define bfd_mach_mips5500             5500
 .#define bfd_mach_mips6000             6000
+.#define bfd_mach_mips7000             7000
 .#define bfd_mach_mips8000             8000
 .#define bfd_mach_mips10000            10000
 .#define bfd_mach_mips12000            12000
index b5e3527..4f1dbcb 100644 (file)
@@ -1568,6 +1568,7 @@ enum bfd_architecture
 #define bfd_mach_mips5400              5400
 #define bfd_mach_mips5500              5500
 #define bfd_mach_mips6000              6000
+#define bfd_mach_mips7000              7000
 #define bfd_mach_mips8000              8000
 #define bfd_mach_mips10000             10000
 #define bfd_mach_mips12000             12000
index 13355c5..e64ee06 100644 (file)
@@ -76,6 +76,7 @@ enum
   I_mips5400,
   I_mips5500,
   I_mips6000,
+  I_mips7000,
   I_mips8000,
   I_mips10000,
   I_mips12000,
@@ -106,6 +107,7 @@ static const bfd_arch_info_type arch_info_struct[] =
   N (64, 64, bfd_mach_mips5400, "mips:5400",      FALSE, NN(I_mips5400)),
   N (64, 64, bfd_mach_mips5500, "mips:5500",      FALSE, NN(I_mips5500)),
   N (32, 32, bfd_mach_mips6000, "mips:6000",      FALSE, NN(I_mips6000)),
+  N (64, 64, bfd_mach_mips7000, "mips:7000",      FALSE, NN(I_mips7000)),
   N (64, 64, bfd_mach_mips8000, "mips:8000",      FALSE, NN(I_mips8000)),
   N (64, 64, bfd_mach_mips10000,"mips:10000",     FALSE, NN(I_mips10000)),
   N (64, 64, bfd_mach_mips12000,"mips:12000",     FALSE, NN(I_mips12000)),
index 1a4dbab..b817223 100644 (file)
@@ -7163,6 +7163,7 @@ mips_set_isa_flags (abfd)
       break;
 
     case bfd_mach_mips5000:
+    case bfd_mach_mips7000:
     case bfd_mach_mips8000:
     case bfd_mach_mips10000:
     case bfd_mach_mips12000:
@@ -8945,6 +8946,7 @@ static const struct mips_mach_extension mips_mach_extensions[] = {
   { bfd_mach_mips5, bfd_mach_mips8000 },
   { bfd_mach_mips10000, bfd_mach_mips8000 },
   { bfd_mach_mips5000, bfd_mach_mips8000 },
+  { bfd_mach_mips7000, bfd_mach_mips8000 },
 
   /* VR4100 extensions.  */
   { bfd_mach_mips4120, bfd_mach_mips4100 },
index 1f02072..be60c80 100644 (file)
@@ -1,3 +1,8 @@
+2003-07-15  Richard Sandiford  <rsandifo@redhat.com>
+
+       * config/tc-mips.c (hilo_interlocks): True for CPU_RM7000.
+       (mips_cpu_info_table): Add rm7000 and rm9000 entries.
+
 2003-07-15  Alan Modra  <amodra@bigpond.net.au>
 
        * config/tc-v850.c (md_assemble): When no reloc, create pcrel fixups
index 0aef575..0aa5a2a 100644 (file)
@@ -336,6 +336,7 @@ static int mips_32bitmode = 0;
 
 #define hilo_interlocks (mips_opts.arch == CPU_R4010                       \
                          || mips_opts.arch == CPU_VR5500                   \
+                         || mips_opts.arch == CPU_RM7000                   \
                          || mips_opts.arch == CPU_SB1                      \
                          )
 
@@ -14289,7 +14290,8 @@ static const struct mips_cpu_info mips_cpu_info_table[] =
   { "rm5231",         0,      ISA_MIPS4,      CPU_R5000 },
   { "rm5261",         0,      ISA_MIPS4,      CPU_R5000 },
   { "rm5721",         0,      ISA_MIPS4,      CPU_R5000 },
-  { "r7000",          0,      ISA_MIPS4,      CPU_R5000 },
+  { "rm7000",         0,      ISA_MIPS4,      CPU_RM7000 },
+  { "rm9000",         0,      ISA_MIPS4,      CPU_RM7000 },
 
   /* MIPS 32 */
   { "4kc",            0,      ISA_MIPS32,     CPU_MIPS32 },
index f747024..17d0d3d 100644 (file)
@@ -1,3 +1,8 @@
+2003-07-15  Richard Sandiford  <rsandifo@redhat.com>
+
+       * gas/mips/rm7000.[sd]: New test.
+       * gas/mips/mips.exp: Run it.
+
 2003-07-10  Jakub Jelinek  <jakub@redhat.com>
 
        * gas/cfi/cfi-ppc-1.s: New test.
index 25cfdf6..89af998 100644 (file)
@@ -552,6 +552,7 @@ if { [istarget mips*-*-*] } then {
     run_dump_test "vr4122"
     run_dump_test "vr5400"
     run_dump_test "vr5500"
+    run_dump_test "rm7000"
     run_dump_test "perfcount"
     run_dump_test "lineno"
     run_dump_test "sync"
diff --git a/gas/testsuite/gas/mips/rm7000.d b/gas/testsuite/gas/mips/rm7000.d
new file mode 100644 (file)
index 0000000..05df9c8
--- /dev/null
@@ -0,0 +1,14 @@
+#objdump: -dr -M gpr-names=numeric -m mips:7000
+#name: MIPS RM7000
+#as: -march=rm7000
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+
+0+000 <\.text>:
+ * 0:  70a62002 *      mul     \$4,\$5,\$6
+ * 4:  70850000 *      mad     \$4,\$5
+ * 8:  70a60001 *      madu    \$5,\$6
+ * c:  00003812 *      mflo    \$7
+ *10:  01000011 *      mthi    \$8
diff --git a/gas/testsuite/gas/mips/rm7000.s b/gas/testsuite/gas/mips/rm7000.s
new file mode 100644 (file)
index 0000000..39de9d5
--- /dev/null
@@ -0,0 +1,5 @@
+       mul     $4,$5,$6
+       mad     $4,$5
+       madu    $5,$6
+       mflo    $7
+       mthi    $8      # No delay needed
index c03bd31..11b8b6f 100644 (file)
@@ -1,3 +1,8 @@
+2003-07-15  Richard Sandiford  <rsandifo@redhat.com>
+
+       * mips.h (CPU_RM7000): New macro.
+       (OPCODE_IS_MEMBER): Match CPU_RM7000 against 4650 insns.
+
 2003-07-09  Alexandre Oliva  <aoliva@redhat.com>
 
        2000-04-01  Alexandre Oliva  <aoliva@cygnus.com>
index 476c8e3..65434a7 100644 (file)
@@ -451,6 +451,7 @@ struct mips_opcode
 #define CPU_VR5400     5400
 #define CPU_VR5500     5500
 #define CPU_R6000      6000
+#define CPU_RM7000     7000
 #define CPU_R8000      8000
 #define CPU_R10000     10000
 #define CPU_R12000     12000
@@ -469,6 +470,7 @@ struct mips_opcode
 #define OPCODE_IS_MEMBER(insn, isa, cpu)                               \
     (((insn)->membership & isa) != 0                                   \
      || (cpu == CPU_R4650 && ((insn)->membership & INSN_4650) != 0)    \
+     || (cpu == CPU_RM7000 && ((insn)->membership & INSN_4650) != 0)   \
      || (cpu == CPU_R4010 && ((insn)->membership & INSN_4010) != 0)    \
      || (cpu == CPU_VR4100 && ((insn)->membership & INSN_4100) != 0)   \
      || (cpu == CPU_R3900 && ((insn)->membership & INSN_3900) != 0)    \
index 2568458..5171dcb 100644 (file)
@@ -1,3 +1,7 @@
+2003-07-15  Richard Sandiford  <rsandifo@redhat.com>
+
+       * mips-dis.c (mips_arch_choices): Add rm7000 and rm9000 entries.
+
 2003-07-14  Nick Clifton  <nickc@redhat.com>
 
        * po/tr.po: Update with latest version.
index 20d95ab..af6c445 100644 (file)
@@ -347,6 +347,10 @@ const struct mips_arch_choice mips_arch_choices[] = {
     mips_cp0_names_numeric, NULL, 0, mips_hwr_names_numeric },
   { "r6000",   1, bfd_mach_mips6000, CPU_R6000, ISA_MIPS2,
     mips_cp0_names_numeric, NULL, 0, mips_hwr_names_numeric },
+  { "rm7000",  1, bfd_mach_mips7000, CPU_RM7000, ISA_MIPS4,
+    mips_cp0_names_numeric, NULL, 0, mips_hwr_names_numeric },
+  { "rm9000",  1, bfd_mach_mips7000, CPU_RM7000, ISA_MIPS4,
+    mips_cp0_names_numeric, NULL, 0, mips_hwr_names_numeric },
   { "r8000",   1, bfd_mach_mips8000, CPU_R8000, ISA_MIPS4,
     mips_cp0_names_numeric, NULL, 0, mips_hwr_names_numeric },
   { "r10000",  1, bfd_mach_mips10000, CPU_R10000, ISA_MIPS4,